Datasheet

8
LTC1290
1290fe
PI FU CTIO S
U
UU
D
IN
(Pin 17): Digital Data Input. The A/D configuration
word is shifted into this input after CS is recognized.
SCLK (Pin 18): Shift Clock. This clock synchronizes the
serial data transfer.
ACLK (Pin 19): A/D Conversion Clock. This clock controls
the A/D conversion process.
V
CC
(Pin 20): Positive Supply. This supply must be kept
free of noise and ripple by bypassing directly to the analog
ground plane.
BLOCK DIAGRAM
INPUT
SHIFT
REGISTER
SAMPLE-
AND-
HOLD
12-BIT
CAPACITIVE
DAC
V
CC
20
ANALOG
INPUT MUX
1
2
3
4
5
6
7
8
9
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
D
OUT
16
SCLK
18
CONTROL
AND
TIMING
15
CS
LTC1290 • BD
17
REF
+
14
DGND
10
AGND
11
V
–
12
REF
–
13
COMP
OUTPUT
SHIFT
REGISTER
D
IN
19
ACLK
12-BIT
SAR
TEST CIRCUITS
5V
A
A
I
OFF
I
ON
POLARITY
OFF
CHANNELS
ON CHANNEL
LTC1290 • TC01
•
•
•
•
On and Off Channel Leakage Current
Load Circuit for t
dis
and t
en
D
OUT
3k
100pF
TEST POINT
5V WAVEFORM 2
WAVEFORM 1
LTC1290 • TC02