Datasheet

28
LTC1290
1290fe
U
SA
O
PP
L
IC
AT
ITY
P
I
CA
L
SNEAK-A-BIT Code for the LTC1290 Using the MC68HC05C4
MNEMONIC DESCRIPTION
READ –/+: LDA #$3F Load D
IN
Word for LTC1290 into ACC
JSR TRANSFER Read LTC1290 Routine
LDA $60 Load MSBs from LTC1290 into ACC
STA $71 Store MSBs in $71
LDA $61 Load LSBs from LTC1290 into ACC
STA $72 Store LSBs in $72
RTS Return
READ +/–: LDA #$7F Load D
IN
Word for LTC1290 into ACC
JSR TRANSFER Read LTC1290 Routine
LDA $60 Load MSBs from LTC1290 into ACC
STA $73 Store MSBs in $73
LDA $61 Load LSBs from LTC1290 into ACC
STA $74 Store LSBs in $74
RTS Return
TRANSFER: BCLR 0,$02 CS Goes Low
STA $0C Load D
IN
into SPI, Start Transfer
LOOP 1: TST $0B Test Status of SPIF
BPL LOOP 1 Loop to Previous Instruction if Not Done
LDA $0C Load Contents of SPI Data Reg. into ACC
STA $0C Start Next Cycle
STA $60 Store MSBs in $60
LOOP 2: TST $0B Test Status of SPIF
BPL LOOP 2 Loop to Previous Instruction if Not Done
BSET 0,$02 CS Goes High
LDA $0C Load Contents of SPI Data Reg. into ACC
STA $61 Store LSBs in $61
RTS Return
CHK SIGN: LDA $73 Load MSBs of ± Read into ACC
ORA $74 Or ACC (MSBs) with LSBs of ± Read
BEQ MINUS If Result is 0 Go to Minus
CLC Clear Carry
ROR $73 Rotate Right $73 Through Carry
ROR $74 Rotate Right $74 Through Carry
LDA $73 Load MSBs of ± Read into ACC
STA $77 Store MSBs in RAM Location $77
LDA $74 Load LSBs of ± Read into ACC
STA $87 Store LSBs in RAM Location $87
BRA END Go to End of Routine
MINUS: CLC Clear Carry
ROR $71 Shift MSBs of ± Read Right
ROR $72 Shift LSBs of ± Read Right
COM $71 1’s Complement of MSBs
COM $72 1’s Complement of LSBs
LDA $72 Load LSBs into ACC
ADD #$01 Add 1 to LSBs
STA $72 Store ACC in $72
CLRA Clear ACC
ADC $71 Add with Carry to MSBs. Result in ACC
STA $71 Store ACC in $71
STA $77 Store MSBs in RAM Location $77
LDA $72 Load LSBs in ACC
STA $87 Store LSBs in RAM Location $87
END: RTS Return
SNEAK-A-BIT Code
D
OUT
from LTC1290 in MC68HC05C4 RAM
D
IN
Words for LTC1290
Sign
LSB
MUX Addr.
UNI
MSBF
Word
Length
D
IN
1
0011 1111
D
IN
2 01 11 1111
D
IN
3 00 11 1111
(ODD/SIGN)
1290 TA06
LOCATION $77 B12 B11 B10 B9 B8 B7 B6 B5
LOCATION $87 B4 B3 B2 B1 B0 Filled with 0s
SNEAK-A-BIT Code for the LTC1290 Using the MC68HC05C4
MNEMONIC DESCRIPTION
LDA #$50 Configuration Data for SPCR
STA $0A Load Configuration Data into $0A
LDA #$FF Configuration Data for Port C DDR
STA $06 Load Configuration Data into Port C DDR
BSET 0,$02 Make Sure CS is High
JSR READ –/+ Dummy Read Configures LTC1290
for next read
JSR READ –/+ Read CH6 with Respect to CH7
JSR READ –/+ Read CH7 with Respect to CH6
JSR CHK Sign Determines which Reading has Valid Data,
Converts to 2’s Complement and
Stores in RAM