Datasheet

15
LTC1290
1290fe
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
Microprocessor Interfaces
The LTC1290 can interface directly (without external hard-
ware) to most popular microprocessor (MPU) synchro-
nous serial formats (see Table 2). If an MPU without a
serial interface is used, then four of the MPU’s parallel port
lines can be programmed to form the serial link to the
LTC1290. Included here are two serial interface examples
and one example showing a parallel port programmed to
form the serial interface
Serial Port Microprocessors
Most synchronous serial formats contain a shift clock
(SCLK) and two data lines, one for transmitting and one for
receiving. In most cases data bits are transmitted on the
falling edge of the clock (SCLK) and captured on the rising
edge. However, serial port formats vary among MPU
manufactures as to the smallest number of bits that can be
sent in one group (e.g., 4-bit, 8-bit or 16-bit transfers).
They also vary as to the order in which the bits are
transmitted (LSB or MSB first). The following examples
show how the LTC1290 accommodates these differences.
Figure 4. CS Low During Conversion (CS Must go High to Low Once to Insure Proper Operation in this Mode)
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
SHIFT RESULT OUT
AND NEW ADDRESS IN
SCLK
CS
D
OUT
D
IN
t
SMPL
SAMPLE ANALOG
INPUT
SHIFT
MUX ADDRESS
IN
LTC1290 F04
48 TO 52
ACLK CYC
SCLK MUST
REMAIN LOW
DON’T CARE
Figure 3. CS High During Conversion
B11B10B9B8B7B6B5B4B3B2B1B0B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
SHIFT RESULT OUT
AND NEW ADDRESS IN
SCLK
CS
D
OUT
D
IN
t
SMPL
SAMPLE ANALOG
INPUT
SHIFT
MUX ADDRESS
IN
LTC1290 F03
48 TO 52
ACLK CYC
DON’T CARE