Datasheet

8
LTC1285/LTC1288
BLOCK DIAGRAM
W
–
+
C
SAMPLE
V
CC
(V
CC
/V
REF
)
CS/SHDN
CLK
D
OUT
IN
+
(CH0)
IN
–
(CH1)
MICROPOWER
COMPARATOR
CAPACITIVE DAC
V
REF
GND
PIN NAMES IN PARENTHESES REFER TO THE LTC1288
LTC1285/88 • BD
(D
IN
)

BIAS AND 
SHUTDOWN CIRCUIT
SAR
SERIAL PORT
TEST CIRCUITS

Voltage Waveforms for D
OUT
Rise and Fall Times, t
r
, t
f
Load Circuit for t
dis
and t
en
D
OUT
1.4V
3k
100pF
TEST POINT
LTC1285/88 • TC01
D
OUT
V
OL
V
OH
t
r
t
f
LTC1285/88 • TC02
Voltage Waveforms for D
OUT
Delay Times, t
dDO
Load Circuit for t
dDO
, t
r
and t
f
CLK
D
OUT
V
IL
t
dDO
V
OL
V
OH
LTC1285/88 • TC03
D
OUT
3k
100pF
TEST POINT
V
CC
t
dis
WAVEFORM 2, t
en
t
dis
WAVEFORM 1
LTC1285/88 • TC04
