Datasheet

7
LTC1278
RD (Pin 20): READ Input. This enables the output
drivers when CS is low.
CS (Pin 21): The CHIP SELECT input must be low for the
ADC to recognize CONVST and RD inputs.
BUSY (Pin 22): The BUSY output shows the converter
status. It is low when a conversion is in progress.
V
SS
(Pin 23): Negative Supply. –5V for bipolar opera-
tion. Bypass to AGND with 0.1µF ceramic. Analog
ground for unipolar operation.
AV
DD
(Pin 24): Positive Supply, 5V. Bypass to AGND
(10µF tantalum in parallel with 0.1µF ceramic).
A
IN
(Pin 1): Analog Input. 0V to 5V (Unipolar), ±2.5V
(Bipolar).
V
REF
(Pin 2): 2.42V Reference Output. Bypass to AGND
(10µF tantalum in parallel with 0.1µF ceramic).
AGND (Pin 3): Analog Ground.
D11 to D4 (Pins 11 to 4): Three-State Data Outputs.
D11 is the Most Significant Bit.
DGND (Pin 12): Digital Ground.
D3 to D0 (Pins 13 to 16): Three-State Data Outputs.
DV
DD
(Pin 17 ): Digital Power Supply, 5V. Tie to AV
DD
pin.
SHDN (Pin 18): Power Shutdown.
CONVST (Pin 19): Conversion Start Signal. This active
low signal starts a conversion on its falling edge (to
recognize CONVST, CS has to be low).
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12-BIT CAPACITIVE DAC
COMPARATOR
2.42V REF
V
REF
C
SAMPLE
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
•
•
•
D11
D0
BUSY
CONTROL LOGIC
CSCONVST RDSHDN
INTERNAL
CLOCK
ZEROING
SWITCH
DV
DD
V
SS
AV
DD
(0V FOR UNIPOLAR MODE
OR –5V FOR BIPOLAR MODE)
A
IN
AGND
DGND
12
12
LTC1278 • BD
FU CTIO AL BLOCK DIAGRA
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