Datasheet

4
LTC1263
BLOCK DIAGRAM
W
+
C1
+
C1
C1
C2
+
C2
C2
S4B
S4A
S3A
S3C
S1
R1
R2
R3
BANDGAP
REFERENCE
OSCILLATOR
V
CC
V
OUT
C
IN
C
OUT
SHDN
GND
CHARGE PUMP
S4C
S3D
S3B
LTC1263 • BD
V
BGAP
S1 AND S2 SHOWN WITH SHDN PIN LOW. S3A, S3B, S3C, S3D, S4A, S4B AND S4C SHOWN CHARGING C1 AND C2
WITH OSCILLATOR OUTPUT LOW AND V
DIV
< V
BGAP
– V
HYST
. AT OSCILLATOR OUTPUT HIGH, S3A, S3B, S3C AND S3D
OPEN WHILE S4A, S4B AND S4C CLOSE TO CHARGE V
OUT
. COMPARATOR HYSTERESIS IS ±V
HYST
S2
V
DIV
CLK
TIMING DIAGRAMS
WUW
1.4V
1.4VV
SHDN
V
OUT
5.1V
12V
t
ON
t
OFF
V
OUT
V
CC
V
CC
0V
LTC1263 • F01
Figure 1. Timing Diagram
1
2
3
4
8
7
6
5
SHDN
GND
V
OUT
V
CC
C1
C1
+
C2
C2
+
LTC1263
C1 = 0.47µF
C2 = 0.47µF
LTC1263 • F02
C3 = 10µF
C4 = 10µF
V
CC
4.75V TO 5.5V
V
SHDN
V
OUT
Figure 2. Timing Circuit