Datasheet

6
LTC1255
OPERATIO
U
Internal Voltage Regulation
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply volt-
age. The charge pump capacitors are included on-chip and
therefore no external components are required to generate
the gate drive. The charge pump is designed to drive a 12V
Zener diode clamp connected across the gate and source
of the MOSFET switch.
(One Channel)
BLOCK DIAGRA
W
Drain Current Sense
The LTC1255 is configured to sense the current flowing
into the drain of the power MOSFET in a high-side applica-
tion. An internal 100mV reference is compared to the drop
across a sense resistor (typically 0.002Ω to 0.10Ω) in
series with the drain lead. If the drop across this resistor
exceeds the internal 100mV threshold, the input latch is
reset and the gate is quickly discharged via a relatively
large N-channel transistor.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
100mV
REFERENCE
10µs
DELAY
LOW STANDBY
CURRENT
REGULATOR
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATOR
ANALOG DIGITAL
INPUT
LATCH
R
S
ONE
SHOT
OSCILLATOR
AND CHARGE
PUMP
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
FAST/SLOW
GATE CHARGE
LOGIC
INPUT
GATE
DRAIN
SENSE
ANALOG SECTION
COMP
GND
V
S
LTC1255 • BD