Datasheet

LTC1235
11
1235fa
Figure 6. Timing Diagram for CE IN and CE OUT
Table 1 shows the state of each pin during battery backup.
If the backup battery is not used, connect V
BATT
to GND
and V
OUT
to V
CC
.
Table 1. Input and Output Status in Battery Backup Mode
SIGNAL STATUS
V
CC
C2 monitors V
CC
for active switchover.
BACKUP BACKUP is ignored.
V
OUT
V
OUT
is connected to V
BATT
through an internal PMOS switch.
V
BATT
The supply current is 1μA maximum.
BATT ON Logic high. The open circuit output voltage is equal to V
OUT
.
PFI Power Failure Input is ignored.
PFO Logic low
PB RST PB RST is ignored.
RESET Logic low
RESET Logic high. The open circuit output voltage is equal to V
OUT
.
LOW LINE Logic low
WDI Watchdog Input is ignored.
WDO Logic high. The open circuit output voltage is equal to V
OUT
.
CE IN Chip Enable Input is ignored.
CE OUT Logic high. The open circuit output voltage is equal to V
OUT
.
Memory Protection
The LTC1235 includes memory protection circuitry which
ensures the integrity of the data in memory by preventing
write operations when V
CC
is at invalid level. Two pins, CE
IN and CE OUT, control the Chip Enable or Write inputs of
CMOS RAM. When V
CC
is +5V, CE OUT follows CE IN with
a typical propagation delay of 20ns. When V
CC
falls below
the reset voltage threshold or V
BATT
, CE OUT is forced
high, independent of CE IN. CE OUT is an alternative signal
to drive the CE, CS, or Write input of battery-backed up
CMOS RAM. CE OUT can also be used to drive the Store
or Write input of an EEPROM, EAROM or NOVRAM to
achieve similar protection. Figure 6 shows the timing
diagram of CE IN and CE OUT.
CE IN can be derived from the microprocessor’s address
decoder output. Figure 7 shows a typical nonvolatile CMOS
RAM application.
Figure 7. A Typical Nonvolatile CMOS RAM Application
V
CC
V1
CE IN
V
OUT
= V
BATT
V
OUT
= V
BATT
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
1235 F06
CE OUT
BACKUP = V
CC
+5V
+3V
0.1μF
10μF
V
BATT
V
CC
LTC1235
V
OUT
GND
1235 F07
V
CC
RESET
CE IN
CE OUT
BACKUP
0.1μF
TO μP
FROM DECODER
CS
20ns PROPAGATION DELAY
62512
RAM
+
GND