Datasheet

3
LTC1197/LTC1197L
LTC1199/LTC1199L
LTC1197 LTC1199
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
CC
= 5V Operation
t
suCS
Setup Time CS Before First CLK 26 26 ns
(See Figures 1, 2)
t
hDI
Hold Time D
IN
After CLK LTC1199 26 ns
t
suDI
Setup Time D
IN
Stable Before CLK LTC1199 26 ns
t
WHCLK
CLK High Time f
CLK
= f
CLK(MAX)
40% 40% 1/f
CLK
t
WLCLK
CLK Low Time f
CLK
= f
CLK(MAX)
40% 40% 1/f
CLK
t
WHCS
CS High Time Between Data Transfer Cycles 32 32 ns
t
WLCS
CS Low Time During Data Transfer 13 15 CLK
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= 5V, V
REF
= 5V, f
CLK
= f
CLK(MAX)
as defined in Recommended Operating Conditions, unless otherwise noted.
0.05V to V
CC
+ 0.05V
LTC1197 LTC1199
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Offset Error ±2 ±2 LSB
Linearity Error (Note 3) ±1 ±1 LSB
Gain Error ±4 ±4 LSB
No Missing Codes Resolution 10 10 Bits
Analog Input Range V
Reference Input Range LTC1197, V
CC
6V 0.2 V
CC
+ 0.05V V
LTC1197, V
CC
> 6V 0.2 6 V
Analog Input Leakage Current (Note 4) ±1 ±1 µA
LTC1197L LTC1199L
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
CC
Supply Voltage 2.7 4 2.7 4 V
V
CC
= 2.7V Operation
f
CLK
Clock Frequency 0.01 3.5 0.01 3.5 MHz
t
CYC
Total Cycle Time 14 16 CLK
t
SMPL
Analog Input Sampling Time 1.5 1.5 CLK
t
hCS
Hold Time CS Low After Last CLK 40 40 ns
t
suCS
Setup Time CS Before First CLK 78 78 ns
(See Figures 1, 2)
t
hDI
Hold Time D
IN
After CLK LTC1199L 78 ns
t
suDI
Setup Time D
IN
Stable Before CLK LTC1199L 78 ns
t
WHCLK
CLK High Time f
CLK
= f
CLK(MAX)
40% 40% 1/f
CLK
t
WLCLK
CLK Low Time f
CLK
= f
CLK(MAX)
40% 40% 1/f
CLK
t
WHCS
CS High Time Between Data Transfer Cycles 96 96 ns
t
WLCS
CS Low Time During Data Transfer 13 15 CLK
The denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at T
A
= 25°C.
RECO E DED OPERATI G CO DITIO S
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CO VERTER A D ULTIPLEXER CHARACTERISTICS
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