Datasheet

22
LTC1197/LTC1197L
LTC1199/LTC1199L
Data Exchange Between LTC1199 and MC68HC05C4
Hardware and Software Interface to Motorola MC68HC05C4
LABEL MNEMONIC COMMENTS
START BCLRn Bit 0 Port C goes low (CS goes low)
LDA Load LTC1199 D
IN
word into ACC
STA Load LTC1199 D
IN
word into SPI from ACC
Transfer begins
TST Test status of SPIF
BPL Loop to previous instruction if not done
with transfer
LDA Load contents of SPI data register
into ACC (D
OUT
MSBs)
STA Start next SPI cycle
AND Clear 6 MSBs of the first D
OUT
word
STA Store in memory location A (MSBs)
TST Test status of SPIF
BPL Loop to previous instruction if not done
with transfer
BSETn Set B0 of Port C (CS goes high)
LDA Load contents of SPI data register into
ACC. (D
OUT
LSBs)
STA Store in memory location A + 1 (LSBs)
MPU TRANSMIT
WORD
CS
CLK
D
OUT
MPU RECEIVED
WORD
D
IN
1
ODD/
SIGN
XXXX
SGL/
DIFF
XXXXXXXX
START
BIT
BYTE 1 BYTE 2 (DUMMY)
X = DON‘T CARE
START DUMMY
SGL/
DIFF
DON‘T CARE
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
ODD/
SIGN
DUMMY
????00B9B8
B7 B6 B5 B4 B3 B2 B1 B0
2ND TRANSFER1ST TRANSFER
1197/99 TA03
D
OUT
from LTC1199 Stored in MC68HC05C4
LOCATION A + 1
LSB
MSB
LOCATION A
BYTE 2
BYTE 1
1197/99 TA05
B7 B6 B5 B4 B3 B2 B1 B0
000000B9B8
TYPICAL APPLICATIO S
U
1197/99 TA04
CLK
D
IN
CS
ANALOG
INPUTS
C0
SCK
D
OUT
MISO
MOSI
MC68HC05C4
LTC1199