Datasheet

14
LTC1159
LTC1159-3.3/LTC1159-5
certain types of inductors in high current (I
OUT
> 5A)
applications when they are lightly loaded.
An external offset is put in series with the SENSE
–
pin to
subtract from the built-in 0.025V offset. An example of this
technique is shown in Figure 7. Two 100Ω resistors are
inserted in series with the leads from the sense resistor.
With the addition of R3, a current is generated through R1
causing an offset of:
V
OFFSET
= V
OUT
) )
R1
R1 + R3
If V
OFFSET
> 0.025V, the minimum threshold will be
cancelled and Burst Mode operation is prevented from
occurring. Since V
OFFSET
is constant, the maximum load
current is also decreased by the same offset. Thus, to get
back to the same I
MAX
, the value of the sense resistor must
be reduced:
R
SENSE
≈ mΩ
75
I
MAX
To prevent noise spikes from erroneously tripping the
current comparator, a 1000pF capacitor is needed across
the SENSE
–
and SENSE
+
pins.
Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1159. These items are also illustrated graphically in
the layout diagram of Figure 8. Check the following in your
layout:
4
3
21
LTC1159
SENSE
+
SENSE
–
9
8
1000pF
R1
100Ω
R2
100Ω
L
R
SENSE
C
OUT
R3
LTC1159 • F07
+
Figure 7. Suppressing Burst Mode Operation
4
3
2
1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
P-GATE
V
IN
V
CC
P-DRIVE
V
CC
C
T
I
TH
SENSE
–
CAP
SHDN2
EXTV
CC
N-GATE
PGND
SGND
SENSE
+
C
OUT
D1
P-CHANNEL
1k
3300pFC
T
R1
R2
R
SENSE
N-CHANNEL
C
IN
L
+
–
–
+
V
OUT
V
IN
OUTPUT DIVIDER
REQUIRED WITH
ADJUSTABLE
VERSION ONLY
BOLD LINES INDICATE HIGH CURRENT PATHS
LTC1159 • F08
1000pF
100pF
1µF
0.15µF
1N4148
SHUTDOWN
5V EXTV
CC
CONNECTION
0.1 µF
V
FB
(SHDN1)
+
+
+
Figure 8. LTC1159 Layout Diagram (N and S Packages)
APPLICATIO S I FOR ATIO
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