Datasheet
9
LTC1096/LTC1096L
LTC1098/LTC1098L
SUPPLY VOLTAGE, V
CC
(V)
0
LOGIC THRESH0LD (V)
3
4
5
8
LTC1096/98 • TPC12
2
1
0
2
4
6
10
T
A
= 25°C
Digital Input Logic Threshold
vs Supply Voltage
Maximum Clock Frequency vs
Supply Voltage
Maximum Clock Frequency vs
Source Resistance
SUPPLY VOLTAGE (V)
0
0
MAXIMUM CLOCK FREQUENCY (MHz)
0.25
0.5
0.75
1.0
1.25
1.5
2468
LTC1096/98 • TPC11
10
T
A
= 25°C
V
REF
= 2.5V
R
SOURCE
–
(kΩ)
1
0
MAXIMUM CLOCK FREQUENCY* (MHz)
0.25
0.50
1
10 100
LTC1096/98 • TPC10
0.75
+ INPUT
– INPUT
R
SOURCE
–
V
IN
T
A
= 25°C
V
CC
= V
REF
= 5V
Wake-Up Time vs Supply Voltage
SUPPLY VOLTAGE, V
CC
(V)
0
WAKE-UP TIME (µs)
3
4
8
LTC1096/98 • TPC13
2
1
0
2
4
6
10
T
A
= 25°C
V
REF
= 2.5V
R
SOURCE
(kΩ)
1
0
MINIMUM WAKE-UP TIME (µs)
2.5
5.0
10
10 100
LTC1096/98 • TPC14
7.5
T
A
= 25°C
V
REF
= 5V
+
–
V
IN
R
SOURCE
+
Minimum Wake-Up Time
vs Source Resistance
TEMPERATURE (°C)
–60
LEAKAGE CURRENT (nA)
10
100
1000
100
LTC1096/98 • TPC15
1
0.1
0.01
–20
20
60
140
–40 0
40
80 120
V
REF
= 5V
V
CC
= 5V
ON CHANNEL
OFF CHANNEL
Input Channel Leakage Current
vs Temperature
Minimum Clock Frequency for
0.1LSB Error
†
vs Temperature
ENOBs vs Frequency
FFT Plot
FREQUENCY
(kHz)
1
0
ENOBs
2
4
6
8
10
10 100
LTC1096/98 • TPC17
9
7
5
3
1
T
A
= 25°C
V
CC
= V
REF
= 5V
f
SMPL
= 31.25kHz
TEMPERATURE (°C)
–60
MINIMUM CLOCK FREQUENCY (kHz)
120
160
200
100
LTC1096/98
•
TPC16
60
40
0
–20
20
60
140
–40 0
40
80 120
V
REF
= 5V
V
CC
= 5V
180
140
100
80
20
FREQUENCY (kHz)
0
–100
AMPLITUDE (dB)
–90
–70
–60
–50
0
–30
2
4
LTC1096/98 • TPC18
–80
–20
–10
–40
6
8
10 12
14 16
T
A
= 25°C
V
CC
= V
REF
= 5V
f
SMPL
= 31.25kHz
f
IN
= 5.8kHz
*Maximum CLK frequency represents the clock frequency at which a 0.1LSB shift in the error at any code
transition from its 0.75MHz value is first detected.
†
As the CLK frequency is decreased from 500kHz, minimum CLK frequency (∆error ≤ 0.1LSB) represents
the frequency at which a 0.1LSB shift in any code transition from its 500kHz value is first detected.
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