Datasheet
11
LTC1096/LTC1096L
LTC1098/LTC1098L
D
OUT
WAVEFORM 1
(SEE NOTE 1)
2.0V
t
dis
90%
10%
D
OUT
WAVEFORM 2
(SEE NOTE 2)
CS
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
LTC1096/98 • TC06
D
OUT
3k
100pF
TEST POINT
5V t
dis
WAVEFORM 2, t
en
t
dis
WAVEFORM 1
LTC1096/98 • TC05
Load Circuit for t
dis
and t
en
TEST CIRCUITS
On and Off Channel Leakage Current Load Circuit for t
dDO
, t
r
and t
f
5V
A
A
I
OFF
I
ON
POLARITY
OFF
CHANNEL
ON CHANNEL
LTC1096/98 • TC1
•
•
•
•
D
OUT
1.4V
3kΩ
100pF
TEST POINT
LTC1096/98 • TC02
Voltage Waveforms for D
OUT
Delay Time, t
dDO
Voltage Waveforms for D
OUT
Rise and Fall Times, t
r
, t
f
CLK
D
OUT
V
IL
t
dDO
V
OH
V
OL
LTC1096/98 • TC03
D
OUT
t
r
t
f
LTC1096/98 • TC04
V
OH
V
OL
Voltage Waveforms for t
dis










