Datasheet

14
LTC1090
1090fc
4. CS Low During Conversion
In the normal mode of operation, CS is brought high
during the conversion time (see Figure 3). The serial port
ignores any SCLK activity while CS is high. The LTC1090
will also operate with CS low during the conversion. In this
mode, SCLK must remain low during the conversion as
shown in Figure 4. After the conversion is complete, the
D
OUT
line will become active with the first output bit. Then
the data transfer can begin as normal.
5. Microprocessor Interfaces
The LTC1090 can interface directly (without external hard-
ware) to most popular microprocessor (MPU) synchronous
Figure 3. CS High During Conversion
Figure 4. CS Low During Conversion
APPLICATIO S I FOR ATIO
WUUU
LTC1090 • AI09
B9
SHIFT RESULT OUT
AND NEW ADDRESS IN
B8 B7 B6 B5 B4 B3 B2 B1 B0B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
ODD/
SIGN
SGL/
DIFF
SEL
1
D
OUT
SCLK
SEL
0
UNI MSBF WL1 WL0
ODD/
SIGN
SGL/
DIFF
SEL
1
SEL
0
UNI MSBF WL1 WL0
t
SMPL
SAMPLE
ANALOG
INPUT
40 TO 44 ACLK CYCLES
SHIFT
MUX
ADDRESS
IN
D
IN
CS
DON’T CARE
LTC1090 • AI10
B9
SHIFT RESULT OUT
AND NEW ADDRESS IN
B8 B7 B6 B5 B4 B3 B2 B1 B0B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
ODD/
SIGN
SGL/
DIFF
SEL
1
SCLK
D
OUT
SEL
0
UNI MSBF WL1 WL0
ODD/
SIGN
SGL/
DIFF
SEL
1
SEL
0
UNI MSBF WL1 WL0
t
SMPL
SAMPLE
ANALOG
INPUT
40 TO 44 ACLK CYCLES
SCLK MUST REMAIN LOW
SHIFT
MUX
ADDRESS
IN
D
IN
CS
DON’T CARE