Datasheet

8
LTC1062
1062fd
AC Coupling an External CMOS Clock Powered
from a Single Positive Supply, V
+
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
0.01µF
V
+
0
1062 TA03
C
V
IN
V
+
100k
V
OUT
V
–
Adding an External (R1, C1) to Eliminate the Clock Feedthrough and
to Improve the High Frequency Attenuation Floor
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
V
OUT
V
+
f
CLK
1062 TA04
C
C1
0.01C
V
IN
R
V
–
R1
10R
–
+
EXTERNAL
BUFFER
Filtering AC Signals from High DC Voltages
FB
AGND
V
–
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
CLK IN = f
C
• 100
1062 TA05
C
0.01µF
C
0.01µF
12R
309.6k
V
IN
R
25.8k
V
–
= –5V
V
+
= 5V
DC OUTPUT
EXAMPLE:
f
CLK
= 100KHz, f
C
= 1kHz. THE FILTER ACCURATELY PASSES
THE HIGH DC INPUT AND ACTS AS 5TH ORDER LP FILTER
FOR THE AC SIGNALS RIDING ON THE DC
HIGH DC INPUT = 100V
f
IN
/f
C
0.01
–1.4
PASSBAND GAIN (dB)
–1.0
–0.6
0.2
0.1 1
1062 TA06
–0.2
–1.2
–0.8
0
–0.4
V
S
= ±5V
f
CLK
= 100kHz
Passband Amplitude Response for the
High DC Accurate 5th Order Filter
TYPICAL APPLICATIO S
U