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LTC1060

1060fb

Universal Dual Filter

Building Block

DESCRIPTIO

APPLICATIO S

■

Guaranteed

Filter Specification for ±2.37V and

±5V Supply

■

Operates Up to 30kHz

■

Low Power and 88dB Dynamic Range at ±2.5V Supply

■

Center Frequency Q Product Up to 1.6MHz

■

Guaranteed

Offset Voltages

■

Guaranteed

Clock-to-Center Frequency Accuracy Over

Temperature:

0.3% for LTC1060A

0.8% for LTC1060

■

Guaranteed

Q Accuracy Over Temperature

■

Low Temperature Coefficient of Q and Center

Frequency

■

Low Crosstalk, 70dB

■

Clock Inputs TTL and CMOS Compatible

■

Single 5V Supply Medium Frequency Filters

■

Very High Q and High Dynamic Range Bandpass,

Notch Filters

■

Tracking Filters

■

Telecom Filters

Single 5V, Gain of 1000 4th Order Bandpass Filter

The LTC

1060 consists of two high performance, switched

capacitor filters. Each filter, together with 2 to 5 resistors,

can produce various 2nd order filter functions such as

lowpass, bandpass, highpass notch and allpass. The

center frequency of these functions can be tuned by an

external clock or by an external clock and resistor ratio. Up

to 4th order full biquadratic functions can be achieved by

cascading the two filter blocks. Any of the classical filter

configurations (like Butterworth, Chebyshev, Bessel, Cauer)

can be formed.

The LTC1060 operates with either a single or dual supply

from ±2.37V to ±8V. When used with low supply

(i.e. single 5V supply), the filter typically consumes 12mW

and can operate with center frequencies up to 10kHz. With

±5V supply, the frequency range extends to 30kHz and

very high Q values can also be obtained.

The LTC1060 is manufactured by using Linear

Technology’s enhanced LTCMOS™ silicon gate process.

Because of this, low offsets, high dynamic range, high

center frequency Q product and excellent temperature

stability are obtained.

The LTC1060 is pinout compatible with MF10.

FEATURES

TYPICAL APPLICATIO

Amplitude Response

LTC1060 • TA01

1mV(RMS)

0.1µF

3.16k

100k

LTC1060

OUTPUT

CLOCK IN

17.5kHz

INPUT FREQUENCY (Hz)

GAIN (dB)

275

LTC1060 • TA02

–10

125

175

225

100

150

200

250

, LTC and LT are registered trademarks of Linear Technology Corporation.

LTCMOS trademark of Linear Technology Corporation.

Summary of content (20 pages)

PAGE 1
LTC1060 Universal Dual Filter Building Block U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Guaranteed Filter Specification for ±2.37V and ±5V Supply Operates Up to 30kHz Low Power and 88dB Dynamic Range at ±2.5V Supply Center Frequency Q Product Up to 1.6MHz Guaranteed Offset Voltages Guaranteed Clock-to-Center Frequency Accuracy Over Temperature: 0.3% for LTC1060A 0.
PAGE 2
LTC1060 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) ORDER PART NUMBER TOP VIEW Supply Voltage ........................................................ 18V Power Dissipation .............................................. 500mW Operating Temperature Range LTC1060AC/LTC1060C ................ – 40°C ≤ TA ≤ 85°C LTC1060AM/LTC1060M ............ – 55°C ≤ TA ≤ 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec)..................
PAGE 3
LTC1060 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Complete Filter) VS = ±2.37V.
PAGE 4
LTC1060 U W TYPICAL PERFOR A CE CHARACTERISTICS Graph 2. Mode 1: (fCLK/f0) Deviation vs Q VS = ±5V TA = 25°C fCLK = 500kHz 0.1 % DEVIATION (fCLK/f0 ) % DEVIATION (fCLK/f0 ) VS = ±5V 0.4 TA = 25°C = 250kHz f 0 CLK –0.4 –0.8 fCLK = 50 (TEST POINT) f0 –1.2 –1.6 –2.0 Graph 3. Mode 1: Q Error vs Clock Frequency fCLK fCLK = 100 (TEST POINT) f0 DEVIATION FROM IDEAL Q (%) Graph 1. Mode 1: (fCLK/f0) Deviation vs Q 0 – 0.1 – 0.2 – 0.3 – 0.4 – 0.5 –2.4 VS = ±5V TA = 25°C VS = ±2.
PAGE 5
LTC1060 U W TYPICAL PERFOR A CE CHARACTERISTICS Graph 11. Mode 1: (fCLK/f0) vs fCLK and Q Graph 10. Mode 1: (fCLK/f0) vs fCLK and Q 0.6 0.4 Q = 20 0.2 VS = ±2.5V TA = 25°C fCLK = 50:1 f0 0.6 DEVIATION FROM 50:1 (%) Q = 50 0 0.4 Q = 50 0.2 Q = 20 0 Q = 10 100 0.2 Q=5 300 400 500 fCLK (MHz) 600 700 0 100 300 400 500 fCLK (MHz) 200 LTC1060 • TPC10 120 –55°C NOTCH DEPTH (dB) 85°C 0.4 125°C 0.2 VS = ±2.5V Q = 10 fCLK = 50:1 f0 –0.2 0 0.2 0.4 1.0 0.6 0.8 fCLK (kHz) 0.4 0.2 1.0 0.
PAGE 6
LTC1060 U W TYPICAL PERFOR A CE CHARACTERISTICS Graph 20. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Q Graph 19. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Q 0.2 Q = 20, Q = 40, Q = 50 0 –0.2 0.4 0.2 Q = 10 0 0.2 0.6 0.8 fCLK (MHz) 0.4 1.2 1.0 0 0.2 0.4 0.6 0.8 fCLK (MHz) 1.2 1.0 LTC1060 • TPC19 TA = 25°C 0.2 –55°C 1.4 0.4 0.8 1.0 1.2 fCLK (MHz) 0.6 TA = 25°C –55°C 0.2 0 Graph 24. Mode 3 (R2 = R4): (fCLK/f0) vs fCLK and Temperature – 55°C –55°C TA = 25°C 0.4 85°C 125°C 0.2 0 0.
PAGE 7
LTC1060 U W U U U U U PIN DESCRIPTION AND APPLICATIONS INFORMATIO Power Supplies The V +A and V +D (pins 7 and 8) and the V –A and V –D (Pins 14 and 13) are, respectively, the analog and digital positive and negative supply pins. For most cases, Pins 7 and 8 should be tied together and bypassed by a 0.1µF disc ceramic capacitor. The same holds for Pins 13 and 14. If the LTC1060 operates in a high digital noise environment, the supply pins can be bypassed separately.
PAGE 8
LTC1060 U W U U APPLICATIO S I FOR ATIO internal op amps, as well as the reference point of all the internal switches are connected to the AGND pin. Because of this, a “clean” ground is recommended. fCLK/f0 Ratio The fCLK/f0 reference of 100:1 or 50:1 is derived from the filter center frequency measured in mode 1, with a Q = 10 and VS = ±5V. The clock frequencies are, respectively, 500kHz/250kHz for the 100:1/150:1 measurement.
PAGE 9
LTC1060 U W U U APPLICATIO S I FOR ATIO Table 2. Wideband RMS Noise VS fCLK f0 NOTCH/HP (µVRMS) BP (µVRMS) LP (µVRMS) ±5V ±5V ±2.5V ±2.5V 50:1 100:1 50:1 100:1 49 (42) 70 (55) 33 (31) 48 (40) 52 (43) 80 (58) 36 (32) 52 (40) 75 (65) 90 (88) 48 (43) 66 (55) ±5V ±5V ±2.5V ±2.5V 50:1 100:1 50:1 100.1 20 (18) 25 (21) 16 (15) 20 (17) 150 (125) 220 (160) 100 (80) 150 (105) 186 (155) 240 (180) 106 (87) 150 (119) ±5V ±5V ±2.5V ±2.5V 50:1 100:1 50:1 100.
PAGE 10
LTC1060 U U U U DEFINITION OF FILTER FUNCTIONS 3. Highpass function: available only in mode 3 at the ouput Pins 3 (18). (Figure 3.) G(s) = HOHP s2 s2 + s(ωo/Q) + ω2o 5. Allpass function: available at Pins 3(18) for mode 4, 4a. G(s) = HOAP HOHP = gain of the HP output for f→ [s2 – s(ωo/Q) + ω2o] s2 + s(ωo/Q) + ω2o fCLK HOAP = gain of the allpass output for 0 < f < 2 fCLK 2 For allpass functions, the center frequency and the Q of the numerator complex zero pair is the same as the denominator.
PAGE 11
LTC1060 U W ODES OF OPERATIO Table 4.
PAGE 12
LTC1060 W R6 U ODES OF OPERATIO R6 R5 R3 R3 R2 3 VIN R1 – 4 N S1A 5 (16) + (17) BP (19) 2 1 Σ R2 LP (20) VIN – + ∫ – 4 N S1A 3 (18) 5 (16) – + (17) 2 ∫ – 6 1 LP (20) ∫ SA/B TLC1060 • MOO03 BP (19) – Σ + 1/2 LTC1060 15 R1 ∫ SA/B 6 R5 TLC1060 • MOO04 1/2 LTC1060 15 V+ V– f0 = fCLK 100(50) R6 R3 ; fn = f0 ; Q = R5 + R6 R2 ( f f0 = CLK 100(50) R6 R5 + R6 ) R6 R3 ; fn = f0 ; Q = R5 + R6 R2 ( 1+ R6 ; R5 + R6 ) f R2 –R2/R1 R3 H0N1(f ← 0) = H0N2 f ← CL
PAGE 13
LTC1060 U W ODES OF OPERATIO R4 R4 R6 R5 R3 R3 R2 R2 VIN R1 4 N S1A 3 (18) 5 (16) – + (17) Σ + 2 BP (19) 1 LP (20) VIN R1 N S1A 3 (18) 5 (16) – 4 + (17) – ∫ ∫ – + Σ 2 ∫ 6 ∫ – TLC1060 • MOO08 6 TLC1060 • MOO07 LP (20) 1 – SA/B SA/B BP (19) 1/2 LTC1060 15 1/2 LTC1060 15 V– V– f f0 = CLK 100(50) f R2 + R6 ; fn = CLK R4 R5 + R6 100(50) H0N1(f ← 0) = – R2 R1 R3 R6 ;Q= R2 R5 + R6 ( ) f f0 = CLK 100(50) R2 + R6 R4 R5 + R6 R2 ; H0HP = –R2/R1; H0BP = –R3/R
PAGE 14
LTC1060 U W ODES OF OPERATIO R4 R3 R2 HP 3 (18) R3 R2 R1 = R2 VIN S1A AP2 3 (18) 5 (16) – 4 + (17) Σ + BP (19) 2 1 LP (20) VIN R1 4 – ∫ – LP 1 (20) – ∫ – ∫ R5 SA/B 1/2 LTC1060 V+ R 1/2 LTC1060 15 V– TLC1060 • MOO10 f0 = Σ BP 2 (19) ∫ SA/B 15 + + 6 6 – (17) S1A 5 (16) ( ) EXTERNAL OP AMP 2R f f0 = CLK 100(50) fCLK R3 R2 R3 ;Q= ; HOAP = – ; HOLP = –2 HOBP = – 2 R2 R1 R2 100(50) – R2 R3 ;Q= R4 R2 + R2 R5 R2 R3 R4 ; H0AP = ; H0HP = – ; H0BP = – ; H0LP = – R4
PAGE 15
LTC1060 U W ODES OF OPERATIO R3 VIN R3 R2 R2=R1 LP1 S1A 3 (18) 5 (16) 2 LP2 (19) 1 (20) VIN R1=R2 4 – (17) 4 – + (17) + Σ – ∫ + ∫ Σ LP (19) ∫ ∫ – TLC1060 • MOO15 15 1/2 LTC1060 TLC1060 • MOO14 1/2 LTC1060 fC = HOLP = 2 x V– fCLK R2 R3 ; HOLP1 = 1 ; HOLP2 = – R2 100(50) R3 Figure 17. Mode 6b: 1st Order Filter Providing Lowpass fP = R3 R2 f R2 f fCLK R2 ; fz = CLK ; GAIN AT AP OUTPUT = 1 FOR 0 ≤ f ≤ CLK 100(50) R3 100(50) R3 2 Figure 18.
PAGE 16
LTC1060 U W U U WW COMM E TS ON THE M ODES OF OPERATIO Modes 2, 2a, and 2b have a notch output which frequency, fn, can be tuned independently from the center frequency, f0. For all cases, however, fn
PAGE 17
LTC1060 U W U U WW COMM E TS ON THE M ODES OF OPERATIO mode 2b section (Figure 22), has a gain exceeding unity which limits the dynamic range of the overall filter. For very selective bandpass/bandreject filters, the mode 3a approach, as in Figure 20, yields better dynamic range since the external op amp helps to optimize the dynamics of the output nodes of the LTC1060. RH1 RG RL1 RL2 LTC1060 VIN R41 1 R31 2 R21 3 R11 4 5 –7.5V V+ = 7.
PAGE 18
LTC1060 U W U U WW COMM E TS ON THE M ODES OF OPERATIO fCLK 200 = ; fCLK ≤ 1MHz f0 1 RH1 RL1 1 R31 2 R21 3 R11 VIN 4 5 6 –5V + V = –5V LPB BPA BPB HPA NB INVA INVB S1A S1B SA/B AGND 20 R52 19 R32 18 8 VD+ VD– LSh 50/100 CLKB VOUT 15 14 VA– CLKA R22 16 VA+ 10 –10 R62 17 7 9 T2L OR CMOS CLOCK IN LPA VOUT /VIN (dB) R41 0 R42 LTC1060 –20 –30 V– = –5V 13 12 – 40 11 – 50 R11 = 60k R41 = 28.84k R52 = 5k R32 = 455.75k RESISTOR VALUES R31 = 54.
PAGE 19
LTC1060 LTC1060 OFFSETS Output Offsets dynamic range. As a rule of thumb, the output DC offsets increase when: The DC offset at the filter bandpass output is always equal to VOS3. The DC offsets at the remaining two outputs (Notch and LP) depend on the mode of operation and external resistor ratios. Table 5 illustrates this. 1. The Q’s decrease. 2. The ratio (fCLK/f0) increases beyond 100:1. This is done by decreasing either the (R2/R4) or the R6/(R5 + R6) resistor ratios.
PAGE 20
LTC1060 U PACKAGE DESCRIPTIO J Package 20-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) 1.060 (26.924) MAX CORNER LEADS OPTION (4 PLCS) .023 – .045 (0.584 – 1.143) HALF LEAD OPTION 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 .025 .220 – .310 (5.588 – 7.874) (0.635) RAD TYP .045 – .065 (1.143 – 1.650) FULL LEAD OPTION .005 (0.127) MIN .300 BSC (7.62 BSC) .200 (5.080) MAX .015 – .060 (0.381 – 1.524) .008 – .018 (0.203 – 0.