Datasheet

6
LTC1044A
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
LV (Pin 6)
The internal logic of the LTC1044A runs between V
+
and
LV (pin 6). For V
+
greater than or equal to 3V, an internal
switch shorts LV to GND (pin 3). For V
+
less than 3V, the
LV pin should be tied to GND. For V
+
greater than or equal
to 3V, the LV pin can be tied to GND or left floating.
OSC (Pin 7) and Boost (Pin 1)
The switching frequency can be raised, lowered, or driven
from an external source. Figure 4 shows a functional
diagram of the oscillator circuit.
By connecting the boost pin (pin 1) to V
+
, the charge and
discharge current is increased and hence, the frequency is
increased by approximately 7 times. Increasing the
7X
(1)
LV
(6)
V
+

(8)
OSC ÷2
OSC
(7)
C
+

(2)
BOOST
C
–

(4)
V
OUT

(5)
GND
(3)
+
C1
C2
LTC1044A • F03
φ
φ
SW1 SW2
CLOSED WHEN
V
+
> 3V
+
Figure 3. LTC1044A Switched-Capacitor Voltage Converter Block Diagram
Figure 4. Oscillator
BOOST
(1)
LV
(6)
OSC
(7)
V
+
6I I
6I
~14pF
LTC1044A • F04
SCHMITT
TRIGGER
I
frequency will decrease output impedance and ripple for
higher load currents.
Loading pin 7 with more capacitance will lower the fre-
quency. Using the boost (pin 1) in conjunction with exter-
nal capacitance on pin 7 allows user selection of the
frequency over a wide range.
Driving the LTC1044A from an external frequency source
can be easily achieved by driving pin 7 and leaving the
boost pin open as shown in Figure 5. The output current
from pin 7 is small (typically 0.5µA) so a logic gate is
capable of driving this current. The choice of using a
CMOS logic gate is best because it can operate over a wide
supply voltage range (3V to 15V) and has enough voltage
swing to drive the internal Schmitt trigger shown in Figure
4. For 5V applications, a TTL logic gate can be used by
simply adding an external pull-up resistor (see Figure 5).
1
2
3
4
8
7
6
5

LTC1044A
V
+
–(V
+
)
+
C1
NC
OSC INPUT
C2
100k
REQUIRED FOR
TTL LOGIC
LTC1044A • F05
+
Figure 5. External Clocking