Datasheet

LT8705
38
8705fb
For more information www.linear.com/LT8705
The Fairchild FDMS7672 meets the specifications with a
maximum R
DS(ON)
of ~6.9mΩ at V
GS
= 4.5V (~10mΩ at
125°C). Checking the power dissipation in the buck region
with V
IN
maximum and V
OUT
minimum yields:
P P
M1
=
I
2
R
+P
SWITCHING
≅
V
OUT
V
IN
•I
OUT


2
•R
DS(ON)
•ρ
τ


+ V
IN
•I
OUT
• f• t
RF1
(
)
W
P
M1
≅
12V
25V
•5A




2
•6.9mΩ•1.5







 
 



+ 25V•5A • 350k •20ns
(
)
=0.06W+0.88W=0.94W
The maximum switching power of 0.88W can be reduced
by choosing a slower switching frequency. Since this
calculation is approximate, measure the actual rise and
fall times on the PCB to obtain a better power estimate.
The maximum dissipation in M2 occurs at maximum input
voltage when the circuit is operating in the buck region.
Using the 6.9mΩ Fairchild FDMS7672 the dissipation is:
P
(M2,BUCK)
≅
V
IN
– V
OUT
V
IN
•I
OUT(MAX)
2
•R
DS(ON)
•ρ
τ




W
P
(M2,BUCK)
≅
25V –12V
25V
• 5A
(
)
2
•6.9mΩ•1.5








=0.13W
Select M3 and M4: With 12V output voltage we need
MOSFETs with 20V or higher rating.
The highest dissipation occurs in the boost region when
input voltage is minimum and output current is highest.
For switch M3 the dissipation is:
P
M3
=P
I
2
R
+P
SWITCHING
≅
V
OUT
– V
IN
(
)
• V
OUT
V
IN
2
•I
OUT
2
•R
DS(ON)
•ρ
τ




+ V
OUT
2
•I
OUT
• f•
t
RF2
V
IN



 



W
as described in the Power MOSFET Selection and Efficiency
Considerations section.
The maximum dissipation in switch M4 is:
P
M4,B OOST
(
)
≅
V
OUT(MAX)
V
IN(MIN)
•I
OUT
2
•ρ
τ
•R
DS(ON)




W
The Fairchild FDMS7672 can also be used for M3 and M4.
Assuming 20ns rise and fall times, the calculated power
loss at the minimum 8V input voltage is then 0.82W for
M3 and 0.39W for M4
Output Voltage: Output voltage is 12V. Select R
FBOUT2
as
20k. R
FBOUT1
is:
R
FBOUT1
=
V
OUT
1.207V
–1




•R
FBOUT2
Select R
FBOUT1
as 178k. Both R
FBOUT1
and R
FBOUT2
should
have a tolerance of no more than 1%.
Capacitors: A low ESR (5mΩ) capacitor network for C
IN
is selected. In this mode, the maximum ripple is:
∆V
(BUCK,ESR)
≅
V
IN(MAX)
•I
OUT(MAX)
V
OUT(MIN)
•ESR
∆V
(BUCK,ESR)
≅
25V •5A
12V
•5mΩ =52mV
assuming ESR dominates the ripple.
Having 5mΩ of ESR for the C
OUT
network sets the maxi-
mum output voltage ripple at:
∆V
(BOOST,ESR)
≅
V
OUT(MAX)
•I
OUT(MAX)
V
IN(MIN)
•ESR
∆V
(BOOST,ESR)
≅
12V •5A
8V
•5mΩ =37.5mV
assuming ESR dominates the ripple.
applicaTions inForMaTion