Datasheet

LT8705
36
8705fb
For more information www.linear.com/LT8705
• Except under the SW pin regions, flood all unused
areas on all layers with copper. Flooding with copper
will reduce the temperature rise of power components.
Connect the copper areas to a DC net (e.g., quiet GND).
• Partition the power ground from the signal ground. The
small-signal component grounds should not return to
the IC GND through the power ground path.
• Place switch M2 and switch M3 as close to the controller
as possible, keeping the GND, BG and SW traces short.
• Minimize inductance from the sources of M2 and M3
to R
SENSE
by making the trace short and wide.
• Keep the high dV/dT nodes SW1, SW2, BOOST1,
BOOST2, TG1 and TG2 away from sensitive small-signal
nodes.
• The output capacitor (–) terminals should be connected
as closely as possible to the (–) terminals of the input
capacitor.
• Connect the top driver boost capacitor, C
B1
, closely to
the BOOST1 and SW1 pins. Connect the top driver boost
capacitor, C
B2
, closely to the BOOST2 and SW2 pins.
• Connect the input capacitors, C
IN
, and output capacitors,
C
OUT
, closely to the power MOSFETs. These capacitors
carry the MOSFET AC current in the boost and buck
regions.
• Connect the FBOUT and FBIN pin resistor dividers to
the (+) terminals of C
OUT
and C
IN
respectively. Small
FBOUT/FBIN bypass capacitors may be connected
closely to the LT8705’s GND pin if needed. The resistor
connections should not be along the high current or
noise paths.
• Route current sense traces (CSP/CSN, CSPIN/CSNIN,
CSPOUT/CSNOUT) together with minimum PC trace
spacing. Avoid having sense lines pass through noisy
areas, such as switch nodes. The optional filter network
capacitor between CSP and CSN should be as close as
possible to the IC. Ensure accurate current sensing with
Kelvin connections at the R
SENSE
resistors.
• Connect the V
C
pin compensation network closely to the
IC, between V
C
and the signal ground pins. The capaci-
tor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
• Connect the INTV
CC
and GATEV
CC
bypass capacitors
close to the IC. The capacitors carry the MOSFET driv-
ers’ current peaks.
Design Example
V
IN
= 8V to 25V
V
OUT
= 12V
I
OUT(MAX)
= 5A
f = 350kHz
Maximum ambient temperature = 60°C
R
T
Selection: Choose the R
T
resistor for the free-running
oscillator frequency using:
R
T
=
43,750
f
OSC
–1




kΩ=
43,750
350
–1




=124kΩ
R
SENSE
Selection: Start by calculating the maximum duty
cycle in the boost region:
DC
(MAX,M3,BOOST)
≅ 1–
V
IN(MIN)
V
O
UT(MAX)




•100%
= 1–
8V
12V




•100%=33%
Next, from the Maximum Inductor Current Sense Voltage
vs Duty Cycle graph in the Typical Performance Charac-
teristics section:
V
RSENSE(MAX,BOOST,MAX)
≅ 107mV
Next, estimate the maximum and minimum inductor cur-
rent ripple in the boost and buck regions respectively:
∆I
L(MAX,BOOST)
≅
V
OUT(MAX)
•I
OUT (MAX,BOOST)
V
IN(M IN)
•
100%
%Ripple
–0.5
A
21 V• 5A
V8 •
100%
40%
.–0 5
= =3.75A
∆I
L(MIN,BUCK)
≅
I
OUT(MAX,BUCK)
01 0%
10%
–0.5
A
= =
5A
100%
10%
–0.5
















0.53A
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