Datasheet

LT8705
25
8705fb
For more information www.linear.com/LT8705
applicaTions inForMaTion
The peak inductor current when operating in the buck
region is:
I
L(MAX,BUCK)
≅I
OUT(MAX)
+
V
OUT(MIN)
•
DC
(MAX,M2,BUCK
100%








2•L • f







A
where DC
(MAX,M2,BUCK)
is the maximum duty cycle per-
centage of the M2 switch in the buck region given by:
DC
MAX,M2,BUCK
(
)
≅ 1–
V
OUT(MIN)
V
IN(MAX)




•100%
Note that the inductor current can be higher during load
transients and if the load current exceeds the expected
maximum I
OUT(MAX)
. It can also be higher during start-
up if inadequate soft-start capacitance is used or during
output shorts. Consider using the output current limiting
to prevent the inductor current from becoming excessive.
Output current limiting is discussed later in the Input/
Output Current Monitoring and Limiting section. Care
-
ful board evaluation of the maximum inductor current
is recommended.
Power MOSFET Selection and Efficiency
Considerations
The LT8705 requires four external N-channel power MOS
-
FETs, two for the top switches (switches M1 and M4, shown
in Figure 3) and two for the bottom switches (switches
M2 and M3, shown in Figure 3). Important parameters for
the power MOSFETs are the breakdown voltage, V
BR,DSS
,
threshold voltage, V
GS,TH
, on-resistance, R
DS(ON)
, reverse-
transfer capacitance, C
RSS
(gate-to-drain capacitance), and
maximum current, I
DS(MAX)
. The gate drive voltage is set
by the 6.35V GATEV
CC
supply. Consequently, logic-level
threshold MOSFETs must be used in LT8705 applications.
It is very important to consider power dissipation when
selecting power MOSFETs. The most efficient circuit will
use MOSFETs that dissipate the least amount of power.
Power dissipation must be limited to avoid overheating
that might damage the devices. For most buck-boost ap
-
plications the M1 and M3 switches will have the highest
po
wer dissipation where M2 will have the lowest unless
the output becomes shorted. In some cases it can be
helpful to use two or more MOSFETs in parallel to reduce
power dissipation in each device. This is most helpful when
power is dominated by I
2
R losses while the MOSFET is
“on”. The additional capacitance of connecting MOSFETs
in parallel can sometimes slow down switching edge rates
and consequently increase total switching power losses.
The following sections provide guidelines for calculating
power consumption of the individual MOSFETs. From a
known power dissipation, the MOSFET junction tempera
-
ture can be obtained using the following formula:
T
J
= T
A
+ P • R
TH(JA)
where:
T
J
is the junction temperature of the MOSFET
T
A
is the ambient air temperature
P is the power dissipated in the MOSFET
R
TH(JA)
is the MOSFET’s thermal resistance from the
junction to the ambient air. Refer to the manufacturer’s
data sheet.
R
TH(JA)
normally includes the R
TH(JC)
for the device plus
the thermal resistance from the case to the ambient tem-
perature R
TH(JC)
. Compare the calculated value of T
J
to
the manufacturer’s data sheets to help choose MOSFETs
that will not overheat.
Switch M1: The power dissipation in switch M1 comes
from two primary components: (1) I
2
R power when the
switch is fully turned “on” and inductor current is flowing
through the drain to source connections and (2) power
dissipated while the switch is turning “on” or “off”. As the
switch turns “on” and “off” a combination of high current
and high voltage causes high power dissipation in the
MOSFET. Although the switching times are short, the aver
-
age power dissipation can still be significant and is often
th
e dominant source of power in the MOSFET. Depending
on the application, the maximum power dissipation in
the M1 switch can happen in the buck region when V
IN
is highest, V
OUT
is highest, and switching power losses