Datasheet

LT8640/LT8640-1
12
Rev.C
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PIN FUNCTIONS
Diagram for internal pull-up and pull-down resistance. 3)
Spread spectrum mode. Tie this pin high to INTV
CC
(~3.4V)
or an external supply of 3V to 4V for pulse-skipping mode
with spread spectrum modulation. 4) Synchronization
mode. Drive this pin with a clock source to synchronize
to an external frequency. During synchronization the part
will operate in pulse-skipping mode.
SYNC/MODE (Pin 17, LT8640-1 Only): For the LT8640-1,
this pin programs four different operating modes: 1)
Burst Mode operation. Tie this pin to ground for Burst
Mode operation at low output loads—this will result in
ultralow quiescent current. 2) Forced Continuous mode
(FCM). This mode offers fast transient response and
full frequency operation over a wide load range. Float
this pin for FCM. When floating, pin leakage currents
should be <1µA. 3) Spread spectrum mode. Tie this pin
high to INTV
CC
(~3.4V) or an external supply of 3V to
4V for forced continuous mode with spread-spectrum
modulation. 4) Synchronization mode. Drive this pin with
a clock source to synchronize to an external frequency.
During synchronization the part will operate in forced
continuous mode.
GND (Pins 18): LT8640/LT8640-1 Ground Pin. Connect
this pin to system ground and to the ground plane.
PG (Pin 19): The PG pin is the open-drain output of an
internal comparator. PG remains low until the FB pin is
within ±8% of the final regulation voltage, and there are
no fault conditions. PG is valid when V
IN
is above 3.4V,
regardless of EN/UV pin state.
FB (Pin 20): The LT8640/LT8640-1 regulates the FB pin to
0.970V. Connect the feedback resistor divider tap to this
pin. Also, connect a phase lead capacitor between FB and
V
OUT
. Typically, this capacitor is 4.7pF to 22pF.
SW (Exposed Pad Pins 21, 22): The exposed pads should
be connected and soldered to the SW trace for good thermal
performance. If necessary due to manufacturing limita
-
tions Pins 21 and 22 may be left disconnected, however
thermal performance will be degraded.
BLOCK DIAGRAM
+
+
–
+
–
SLOPE COMP
INTERNAL 0.97V REF
OSCILLATOR
200kHz TO 3MHz
BURST
DETECT
3.4V
REG
M1
M2
C
BST
C
OUT
V
OUT
8640 BD
SW
L
BST
8, 9, 21, 22
SWITCH
LOGIC
AND
ANTI-
SHOOT
THROUGH
ERROR
AMP
SHDN
±8%
V
C
INTV
CC
SHDN
THERMAL SHDN
INTV
CC
UVLO
V
IN
UVLO
SHDN
THERMAL SHDN
V
IN
UVLO
EN/UV
1V
+
–
14
4
3
18
GND
INTV
CC
2
BIAS
1
V
IN2
13
GND1
6, 7
GND2
60k
600k
10, 11
PG
19
FB
R1C1
R3
OPT
R4
OPT
R2
R
T
C
SS
OPT
V
OUT
20
TR/SS
1.9µA
16
RT
15
SYNC/MODE
17
V
IN1
V
IN
C
IN1
C
IN3
C
VCC
C
IN2
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