Datasheet

LT8620
17
8620fa
For more information www.linear.com/LT8620
APPLICATIONS INFORMATION
subharmonic oscillations at the frequency set by R
T
, then
the slope compensation will be sufficient for all synchro-
nization frequencies.
For some applications it is desirable for the LT8620 to
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. First is the clock stays
awake at all times and all switching cycles are aligned to
the clock. Second is
that full switching frequency is reached
at lower output load than in Burst Mode operation. These
two differences come at the expense of increased quiescent
current. To enable pulse-skipping mode, the SYNC pin is
tied high either to a logic output or to the INTVCC pin.
The LT8620 does not operate in forced continuous mode
regardless of SYNC signal. Never leave the SYNC pin
floating.
Shorted and Reversed Input Protection
The LT8620 will tolerate a shorted output. Several features
are used for protection during output short-circuit and
brownout conditions. The first is the switching frequency
will be folded back while the output is lower than the set
point to maintain inductor current control. Second, the
bottom switch current is monitored such that if inductor
current is beyond safe levels switching of
the top switch
will be delayed until such time as the inductor current
falls to safe levels.
Frequency foldback behavior depends on the state of the
SYNC pin: If the SYNC pin is low the switching frequency
will slow while the output voltage is lower than the pro-
grammed level. If the SYNC pin is connected to a clock
source or tied high, the LT8620 will stay
at the programmed
frequency without foldback and only slow switching if the
inductor current exceeds safe levels.
There is another situation to consider in systems where
the output will be held high when the input to the LT8620
is absent. This may occur in battery charging applications
or in battery-backup systems where a battery or some
other supply is diode ORed with the LT8620’s
output. If
the V
IN
pin is allowed to float and the EN pin is held high
(either by a logic signal or because it is tied to V
IN
), then
the LT8620’s internal circuitry will pull its quiescent current
through its SW pin. This is acceptable if the system can
tolerate several μA in this state. If the EN pin is grounded
the SW pin
current will drop to near 1µA. However, if the
V
IN
pin is grounded while the output is held high, regard-
less of EN, parasitic body diodes inside the LT8620 can
pull current from the output through the SW pin and
the V
IN
pin. Figure 3 shows a connection of the V
IN
and
EN/UV pins that will allow the LT8620 to run only when
the
input voltage is present and that protects against a
shorted or reversed input.
Figure 3. Reverse V
IN
Protection
V
IN
V
IN
D1
LT8620
EN/UV
8620 F03
GND
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 4 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT8620’s V
IN
pins, GND pins, and the input
capacitor. The loop formed by the input capacitor should
be as small as possible by placing the capacitor adjacent
to
the V
IN
and GND pins. When using a physically large
input capacitor the resulting loop may become too large
in which case using a small case/value capacitor placed
close to the V
IN
and GND pins plus a larger capacitor
further away is preferred. These components, along with
the inductor and output capacitor, should be placed on the
same side of the circuit board, and their
connections should
be made on that layer. Place a local, unbroken ground
plane under the application circuit on the layer closest to
the surface layer. The SW and BOOST nodes should be
as small as possible. Finally, keep the FB and RT nodes
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