Datasheet

LT8619/LT8619-5
20
Rev A
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R
T
= 20kΩ
V
FB
(V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
0.5
1.0
1.5
2.0
2.5
f
SW
(MHz)
8619 F08
Figure8. Frequency Foldback Transfer Function
Figure9. Short-Circuit Waveform with V
IN
= 12V,
V
OUT
= 3.3V, f
OSC
= 2MHz, L = 4.7μH, C
OUT
= 22μF
V
IN
V
IN
LT8619
EN/UV
GND
8619 F10
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure11
and Figure12 show the recommended component place-
ment with trace, ground plane and via locations. Note that
large, switched currents flow in the LT8619’s V
IN
, SW,
GND pins, and the input capacitor. The loop formed by
these components should be as small as possible by plac -
ing the capacitor adjacent to the V
IN
and GND pins. When
using a physically large input capacitor, the resulting loop
may become too large in which case using a small case/
value capacitor placed close to the V
IN
and GND pins plus
a larger capacitor further away is preferred. These com-
ponents, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane under the application cir-
cuit on the layer closest to the surface layer. The SW and
BST nodes should be as small as possible. Finally, keep
the FB and R
T nodes small so that the ground traces will
shield them from the SW and BST nodes. The exposed
pad on the bottom of the package must be soldered to
ground so that the pad is connected to ground electrically
and also acts as a heat sink thermally. To keep thermal
resistance low, extend the ground plane as much as pos-
sible, and add thermal vias under and near the LT8619 to
additional ground planes within the cir
cuit board and on
the bottom side.
High T
emperature Output Current Considerations
The maximum practical continuous load that the LT8619
can drive, while rated at 1.2A, actually depends upon both
the internal current limit (refer to the Typical Performance
Characteristics section) and the internal temperature
which depends on operating conditions, PCB layout and
airflow.
APPLICATIONS INFORMATION
5μs/DIV
V
OUT
1V/DIV
I
SHORT
10A/DIV
I
L
0.5A/DIV
SW
10V/DIV
8619 F09
Reversed Input Protection
Load protection may be necessary in systems where the
output will be held high when the input to the LT8619 is
absent. This may occur in battery charging applications or
in battery backup systems where a battery or some other
supply is diode ORed with the LT8619’s output. If the V
IN
pin is allowed to float and the EN/UV pin is held high (either
by a logic signal or because it is tied to V
IN
), then the
LT8619’s internal circuitry will pull its quiescent current
through its SW pin. This is acceptable if the system can tol-
erate several μA in this state. If the EN/UV pin is grounded
the SW pin current will drop to near 1µA. However, if the
V
IN
pin is grounded while the output is held high, regard-
less of EN/UV, parasitic body diodes inside the LT8619
can pull current from the output through the SW pin and
the V
IN
pin. Figure10 shows a connection of the V
IN
and
EN/UV pins that will allow the LT8619
to run only when
the input voltage is present and that protects against a
shorted or reversed input.
Figure10. Reverse V
IN
Protection
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