Datasheet

LT8610
9
8610fa
For more information www.linear.com/LT8610
PIN FUNCTIONS
BIAS (Pin 14): The internal regulator will draw current from
BIAS instead of V
IN
when BIAS is tied to a voltage higher
than 3.1V. For output voltages of 3.3V and above this pin
should be tied to V
OUT
. If this pin is tied to a supply other
than V
OUT
use a 1µF local bypass capacitor on this pin.
PG (Pin 15): The PG pin is the open-drain output of an
internal comparator. PG remains low until the FB pin is
within ±9% of the final regulation voltage, and there are
no fault conditions. PG is valid when V
IN
is above 3.4V,
regardless of EN/UV pin state.
FB (Pin 16): The LT8610 regulates the FB pin to 0.970V.
Connect the
feedback resistor divider tap to this pin. Also,
connect
a phase lead capacitor between FB and V
OUT
.
Typically, this capacitor is 4.7pF to 10pF.
GND (Exposed Pad Pin 17): Ground. The exposed pad
must be connected to the negative terminal of the input
capacitor and soldered to the PCB in order to lower the
thermal resistance.
BLOCK DIAGRAM
+
+
–
+
–
SLOPE COMP
INTERNAL 0.97V REF
OSCILLATOR
200kHz TO 2.2MHz
BURST
DETECT
3.4V
REG
M1
M2
C
BST
C
OUT
V
OUT
8610 BD
SW
L
BST
9-11
SWITCH
LOGIC
AND
ANTI-
SHOOT
THROUGH
ERROR
AMP
SHDN
±9%
V
C
SHDN
TSD
INTV
CC
UVLO
V
IN
UVLO
SHDN
TSD
V
IN
UVLO
EN/UV
1V
+
–
4
12
17
GND
INTV
CC
13
BIAS
14
PGND
7, 8
PG
15
FB
R1C1
R3
OPT
R4
OPT
R2
R
T
C
SS
OPT
V
OUT
16
TR/SS
2.2µA
2
RT
3
SYNC
1
V
IN
V
IN
C
IN
C
VCC
5, 6