Datasheet

LT8300
15
8300f
applicaTions inForMaTion
Tables 2 and 3 show some recommended diodes and
Zener diodes.
Table 2. Recommended Zener Diodes
PART
V
ZENER
(V)
POWER
(W) CASE VENDOR
MMSZ5266BT1G 68 0.5 SOD-123 On Semi
MMSZ5270BT1G 91 0.5 SOD-123
CMHZ5266B 68 0.5 SOD-123 Central
Semiconductor
CMHZ5267B 75 0.5 SOD-123
BZX84J-68 68 0.5 SOD323F NXP
BZX100A 100 0.5 SOD323F
Table 3. Recommended Diodes
PART I (A)
V
REVERSE
(V) CASE VENDOR
BAV21W 0.625 200 SOD-123 Diodes Inc.
BAV20W 0.625 150 SOD-123
The recommended approach for designing an RC snubber
is to measure the period of the ringing on the SW pin when
the power switch turns off without the snubber and then
add capacitance (starting with 100pF) until the period of
the ringing is 1.5 to 2 times longer. The change in period
will determine the value of the parasitic capacitance, from
which the parasitic inductance can be determined from
the initial period, as well. Once the value of the SW node
capacitance and inductance is known, a series resistor can
be added to the snubber capacitance to dissipate power
and critically dampen the ringing. The equation for deriving
the optimal series resistance using the observed periods
( t
PERIOD
and t
PERIOD(SNUBBED)
) and snubber capacitance
(C
SNUBBER
) is:
C
PAR
=
C
SNUBBER
t
PERIOD(SNUBBED)
t
PERIOD






2
−1
L
PAR
=
t
PERIOD
2
C
PAR
• 4π
2
R
SNUBBER
=
L
PAR
C
PAR
Figure 7. Undervoltage Lockout (UVLO)
LT8300
GND
EN/UVLO
R1
RUN/STOP
CONTROL
(OPTIONAL)
R2
V
IN
8300 F07
Note that energy absorbed by the RC snubber will be
converted to heat and will not be delivered to the load.
In high voltage or high current applications, the snubber
may need to be sized for thermal dissipation.
Undervoltage Lockout (UVLO)
A resistive divider from V
IN
to the EN/UVLO pin imple-
ments undervoltage lockout (UVLO). The EN/UVLO pin
falling threshold is set at 1.223V with 16mV hysteresis.
In addition, the EN/UVLO pin sinks 2.5µA when the volt-
age at the pin is below 1.223V. This current provides user
programmable hysteresis based on the value of R1. The
programmable UVLO thresholds are:
V
IN(UVLO+)
=
1.239V • (R1
+
R2)
R2
+ 2.5µA • R1
V
IN(UVLO−)
=
1.223V •(R1+ R2)
R2
Figure 7 shows the implementation of external shutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT8300 in shutdown with quiescent current less than 2µA.