Datasheet

LT6604-15
11
660415fb
APPLICATIONS INFORMATION
where impedance must be considered is the evaluation of
the LT6604-15 with a network analyzer.
Figure 5 is a laboratory setup that can be used to char-
acterize the LT6604-15 using single-ended instruments
with 50 source impedance and 50 input impedance.
For a unity gain con guration the LT6604-15 requires
an 536 source resistance yet the network analyzer
output is calibrated for a 50 load resistance. The 1:1
transformer, 52.3 and 523 resistors satisfy the two
constraints above. The transformer converts the single-
ended source into a differential stimulus. Similarly, the
output of the LT6604-15 will have lower distortion with
larger load resistance yet the analyzer input is typically
50. The 4:1 turns (16:1 impedance) transformer and the
two 402 resistors of Figure 5, present the output of the
LT6604-15 with a 1600 differential load, or the equiva-
lent of 800 to ground at each output. The impedance
seen by the network analyzer input is still 50, reducing
refl ections in the cabling between the transformer and
analyzer input.
Differential and Common Mode Voltage Ranges
The differential amplifi ers inside the LT6604-15 contain
circuitry to limit the maximum peak-to-peak differential
voltage through the fi lter. This limiting function prevents
excessive power dissipation in the internal circuitry and
provides output short-circuit protection. The limiting
function begins to take effect at output signal levels
above 2V
P-P
and it becomes noticeable above 3.5V
P-P
.
This is illustrated in Figure 6; the LT6604-15 channel was
confi gured with unity passband gain and the input of the
lter was driven with a 1MHz signal. Because this voltage
limiting takes place well before the output stage of the
lter reaches the supply rails, the input/output behavior
of the IC shown in Figure 6 is relatively independent of
the power supply voltage.
The two amplifi ers inside the LT6604-15 channel have
independent control of their output common mode voltage
(see the Block Diagram section). The following guidelines
will optimize the performance of the fi lter.
V
MID
can be allowed to fl oat, but it must be bypassed to an
AC ground with a 0.01µF capacitor or some instability may
be observed. V
MID
can be driven from a low impedance
source, provided it remains at least 1.5V above V
and at
least 1.5V below V
+
. An internal resistor divider sets the
voltage of V
MID
. While the internal 11k resistors are well
matched, their absolute value can vary by ±20%. This
should be taken into consideration when connecting an
external resistor network to alter the voltage of V
MID
.
V
OCM
can be shorted to V
MID
for simplicity. If a different
common mode output voltage is required, connect V
OCM
to a voltage source or resistor network. For 3V and 3.3V
supplies the voltage at V
OCM
must be less than or equal
to the mid supply level. For example, voltage (V
OCM
) ≤
1.65V on a single 3.3V supply. For power supply voltages
higher than 3.3V the voltage at V
OCM
can be set above mid
supply. The voltage on V
OCM
should not be more than 1V
below the voltage on V
MID
. The voltage on V
OCM
should
not be more than 2V above the voltage on V
MID
. V
OCM
is
a high impedance input.
The LT6604-15 was designed to process a variety of input
signals including signals centered on the mid-supply volt-
age and signals that swing between ground and a positive
voltage in a single supply system (Figure 1). The range of
allowable input common mode voltage (the average of V
IN
+
and V
IN
in Figure 1) is determined by the power supply
level and gain setting (see Distortion vs Input Common
Mode Level in the Typical Performance Characteristics).
1MHz INPUT LEVEL (V
P-P
)
0
20
0
–20
–40
–60
–80
–100
35
660415 F06
12
467
OUTPUT LEVEL (dBV)
3RD HARMONIC
85°C
1dB COMPRESSION
POINTS
25°C
85°C
3RD HARMONIC
25°C
2ND HARMONIC, 25°C
2ND
HARMONIC
85°C
Figure 6. Output Level vs Input Level, Differential
1MHz Input, Gain = 1