Datasheet

LT6350
5
6350fc
For more information www.linear.com/LT6350
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Inputs are protected by diodes to each supply. Additionallly,
op amp inputs +IN1, –IN1 and +IN2 are protected by back-to-back diodes
across the op amp inputs. If inputs are taken beyond the supplies or if
either op amp’s differential input voltage exceeds 0.7V, the input current
must be limited to less than 20mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted indefinitely.
Note 4: The LT6350C/LT6350I are guaranteed functional over the
temperature range of –40°C to 85°C. The LT6350H is guaranteed
functional over the temperature range of –40°C to 125°C.
Note 5: The LT6350C is guaranteed to meet specified performance from
0°C to 70°C. The LT6350C is designed, characterized and expected to
meet specified performance from –40°C to 85°C, but is not tested or
QA sampled at these temperatures. The LT6350I is guaranteed to meet
specified performance from –40°C to 85°C. The LT6350H is guaranteed to
meet specified performance from –40°C to 125°C.
Note 6: V
OS2
is measured as the total output common mode voltage offset
(error between output common mode and voltage at V2). V
OS2
includes
the combined effects of op amp 2’s voltage offset, I
B
, I
OS
and mismatch
between on-chip resistors and the 499Ω external resistor, R1 (See Figure 1).
Note 7: Supply voltage range is guaranteed by the power supply rejection
ratio test.
Note 8: Output balance is calculated from gain error and gain as:
BAL
GAIN
GAIN
ERR
=
Note 9: DC linearity is measured by measuring the differential output for
each input in the set V
+IN1
= 0.5V, 2.5V, 4.5V, and calculating the maximum
deviation from the least squares best fit straight line generated from the
three data points.
Note 10: Output voltage swings are measured between the output and
power supply rails.
Note 11: Full- power bandwidth is calculated from the slew rate.
FPBW = SR/2�V
P
.
elecTrical characTerisTics
The l denotes specifications that apply over the full specified temperature range,
otherwise specifications are at T
A
= 25°C. Unless noted otherwise, V
+
= 5V, V
= 0V, V
+IN1
= V2 = Mid-Supply, V
SHDN
= V
+
, R
L
= OPEN, R
F
=
SHORT, R
G
= OPEN. V
S
is defined as (V
+
– V
). V
OUTCM
is defined as (V
OUT1
+ V
OUT2
)/2. V
OUTDIFF
is defined as (V
OUT1
– V
OUT2
). See Figure 1.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
FPBW Full-Power Bandwidth (Note 11) V
OUTDIFF
= 8V
P-P
1.6 MHz
C
L
Capacitive Load Drive, 20% Overshoot No Series Output Resistors 56 pF
SR Differential Slew Rate OUT1 Rising (OUT2 Falling)
OUT1 Falling (OUT2 Rising)
48
41
V/µs
V/µs
HD2
HD3
10kHz Distortion V
S
= 5V, V
OUTDIFF
= 4V
P-P
, R
L
= 2kΩ
2nd Harmonic
3rd Harmonic
–115
–115
dBc
dBc
HD2
HD3
100kHz Distortion V
S
= 5V, V
OUTDIFF
= 4V
P-P
, R
L
= 2kΩ
2nd Harmonic
3rd Harmonic
–102
–97
dBc
dBc
HD2
HD3
1MHz Distortion V
S
= 5V, V
OUTDIFF
= 4V
P-P
, R
L
= 2kΩ
2nd Harmonic
3rd Harmonic
–86
–75
dBc
dBc
t
S
Settling Time to a 4V Input Step 0.1%
0.01%
0.0015% (±1LSB, 16-Bit, Falling Edge)
200
240
350
ns
ns
ns
t
OVDR
Overdrive Recovery Time +IN1 to V
and V
+
200 ns
t
ON
Turn-On Time V
SHDN
= 0V to 5V 400 ns
t
OFF
Turn-Off Time V
SHDN
= 5V to 0V 400 ns