Datasheet

LT6236/LT6237/LT6238
18
623637fa
For more information www.linear.com/LT6236
Functional Description
Figure 1 is a simplified schematic of the LT6236/LT6237/
LT6238, which has a pair of low noise input transistors
Q1 and Q2. A simple current mirror Q3/Q4 converts the
differential signal to a single-ended output, and these
transistors are degenerated to reduce their contribution
to the overall noise. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability without
degrading
the gain bandwidth of the amplifier. Capacitor
C
M
sets the overall amplifier gain bandwidth. The differ-
ential drive generator supplies current to transistors Q5
and Q6 that provide rail-to-rail output swing.
Input Protection
Back-to-back diodes, D1 and D2, limit the differential
input voltage to ±0.7V. The inputs of the LT6236/LT6237/
LT6238 do not have internal resistors in series with the
input
transistors. This technique is often used to protect
the input devices from over voltage that causes excessive
current to flow. The addition of these resistors would
significantly degrade the voltage noise of these amplifiers.
For instance, a 100Ω resistor in series with each input
would generate 1.8nV/√Hz of noise, and the total amplifier
noise voltage would rise from 1.1nV/√Hz to 2.1nV/√Hz.
Once the input differential
voltage exceeds ±0.7V, steady
state current conducted through the protection diodes
should be limited to ±40mA. This implies 25Ω of protec-
tion resistance is necessary per volt of overdrive beyond
APPLICATIONS INFORMATION
±0.7V. These input diodes are rugged enough to handle
transient currents due to amplifier slew rate overdrive and
clipping without protection resistors. Figure 2 shows the
output response to an input overdrive with the amplifier
connected as
a voltage follower. With the input signal
low, current source I1 saturates and the differential drive
generator drives Q6 into saturation so the output voltage
swings all the way to V
–
. The input can swing positive
until transistor Q2 saturates into current mirror Q3/Q4.
When saturation occurs, the output tries to phase invert,
but diode D2 conducts current from the signal source to
the output
through the feedback connection. The output
is clamped a diode drop below the input. In Figure 2, the
input signal generator is limiting at about 20mA.
With the amplifier connected in a gain of A
V
≥ 2, the output
can invert with very heavy overdrive. To avoid this inver-
sion, limit the input overdrive to 0.5V beyond the power
supply rails.
Figure 1. Simplified Schematic
ENABLE
DESD6
DESD5
–V
+V
+V
IN
–V
IN
+V
62367 F01
BIAS
DIFFERENTIAL
DRIVE GENERATOR
V
OUT
+V
C
M
I1
–V
DESD3
–V
–V
DESD4
+V
DESD1
–V
DESD2
+V
D1
C1
D2
Q5
Q6
Q4
Q2
Q3
Q1
Figure 2. V
S
= ±2.5V, A
V
= 1 with Large Overdrive
2.5V
0V
–2.5V
500µs/DIV
62367 F02
1V/DIV