Datasheet
LT6109-1/LT6109-2
19
610912fa
R3 should be chosen to allow sufficient V
OL
and compara-
tor output rise time due to capacitive loading.
R2 can be calculated:
R2 =
R1• V
+
– 400mV
( )
– V
HYS(EXTRA)
• R3
( )
V
HYS(EXTRA)
For very large values of R2 PCB related leakage may
become an issue. A tee network can be implemented to
reduce the required resistor values.
The approximate total hysteresis will be:
V
HYS
= 10mV +R1•
V
+
– 400mV
R2+ R3
For example, to achieve I
UNDER
= 100µA with 50mV of
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 =
10k and V
+
= 5V results in R2 = 4.12M.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R6 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2 + R3) >> R6. The maximum V
OUTA
error
caused by this can be calculated as:
∆V
OUTA
= V
+
•
R6
R1+R2+ R3+ R6
APPLICATIONS INFORMATION
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
from the output of the amplifier, they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with the additional hysteresis. The input
falling edge threshold which causes the output to transition
from high to low is:
V
TH(F)
= 400mV •R1•
1
R1
+
1
R2+ R3
–
V
+
• R1
R2+ R3
The input rising edge threshold which causes the output
to transition from low to high is:
V
TH(R)
= 410mV •R1•
1
R1
+
1
R2
Figure 14 shows how to add additional hysteresis to an
inverting comparator.
R7 can be calculated from the amplifier output current which
is required to cause the comparator output to trip, I
OVER
.
R7 =
400mV
I
OVER
, Assuming R1+R2
( )
>> R7
Figure 14. Inverting Comparator with Added Hysteresis
–
+
V
+
V
+
V
–
INC1
V
–
5
610912 F14
OUTA 8
9
6
V
+
V
+
SENSEHI
LT6109-1
R
IN
R
SENSE
I
LOAD
V
+
SENSELO
OUTC14
1
10
400mV
REFERENCE
R3
R6
R7
R1
VTH
R2
V
DD
–
+