Datasheet

LT6106
9
6106fa
APPLICATIONS INFORMATION
Output Error Due to the Amplifi er DC Offset
Voltage, V
OS
EV
R
R
OUT VOS OS
OUT
IN
()
•=
The DC offset voltage of the amplifi er adds directly to the
value of the sense voltage, V
SENSE
. This is the dominant
error of the system and it limits the low end of the dynamic
range. The paragraph “Selection of External Current Sense
Resistor” provides details.
Output Error Due to the Bias Currents, I
B
+
and I
B
–
The bias current I
B
+
fl ows into the positive input of the
internal op amp. I
B
–
fl ows into the negative input.
E
OUT(IBIAS)
= R
OUT
I
B
+
•
R
SENSE
R
IN
–I
B
–
⎛
⎝
⎜
⎞
⎠
⎟
Assuming I
B
+
≅ I
B
–
= I
BIAS
, and R
SENSE
<< R
IN
then:
E
OUT(IBIAS)
≅ –R
OUT
• I
BIAS
It is convenient to refer the error to the input:
E
IN(IBIAS)
≅ –R
IN
• I
BIAS
For instance if I
BIAS
is 60nA and R
IN
is 1k, the input referred
error is 60μV. Note that in applications where R
SENSE
≅
R
IN
, I
B
+
causes a voltage offset in R
SENSE
that cancels the
error due to I
B
–
and E
OUT(IBIAS)
≅ 0mV. In most applica-
tions, R
SENSE
<< R
IN
, the bias current error can be similarly
reduced if an external resistor R
IN
+
= (R
IN
– R
SENSE
) is
connected as shown in Figure 4. Under both conditions:
E
IN(IBIAS)
= ±R
IN
• I
OS
; where I
OS
= I
B
+
– I
B
–
If the offset current, I
OS
, of the LT6106 amplifi er is 6nA,
the 60μV error above is reduced to 6μV.
Adding R
IN
+
as described will maximize the dynamic
range of the circuit. For less sensitive designs, R
IN
+
is
not necessary.
Output Error Due to Gain Error
The LT6106 exhibits a typical gain error of –0.25% at 1mA
output current. The primary source of gain error is due to
the fi nite gain to the PNP output transistor, which results in
a small percentage of the current in R
IN
not appearing in the
output load R
OUT
.
Minimum Output Voltage
The curves of the Output Voltage vs Input Sense Voltage
show the behavior of the LT6106 with low input sense volt-
ages. When V
SENSE
= 0V, the output voltage will always
be slightly positive, the result of input offset voltages and
of a small amount of quiescent current (0.7μA to 1.2μA)
fl owing through the output device. The minimum output
voltage in the Electrical Characteristics table include both
these effects.
Power Dissipation Considerations
The power dissipated by the LT6106 will cause a small
increase in the die temperature. This rise in junction tem-
perature can be calculated if the output current and the
supply current are known.
The power dissipated in the LT6106 due to the output
signal is:
P
OUT
= (V
IN
–
– V
OUT
) • I
OUT
Since V
IN
–
≅ V
+
, P
OUT
≅ (V
+
– V
OUT
) • I
OUT
The power dissipated due to the quiescent supply current is:
P
Q
= I
S
• (V
+
– V
–
)
The total power dissipated is the output dissipation plus
the quiescent dissipation:
P
TOTAL
= P
OUT
+ P
Q
The junction temperature is given by:
T
J
= T
A
+ θ
JA
• P
TOTAL
At the maximum operating supply voltage of 36V and the
maximum guaranteed output current of 1mA, the total
Figure 4. Second Input R Minimizes Error Due to Input Bias Current
LT6106
R
OUT
V
OUT
6106 F04
R
IN
–
R
IN
+
V
+
LOAD
R
SENSE
–
+
V
+
V
–
OUT
R
IN
+
= R
IN
–
– R
SENSE
–IN+IN