Datasheet
LT4351
15
4351fd
APPLICATIONS INFORMATION
Since the boost regulator supplies current for V
DD
, the
current is the V
DD
supply current (3.5mA) plus the aver-
age current to charge the gate. For a gate charge of 50nC
at a 10kHz rate, this adds 0.5mA of current. The power
dissipated by the boost regulator to supply the 4mA is
shown in Figure 12, representing a more typical situation.
Finally, the gate driver dissipates power internally when
charging and discharging the gate of the MOSFETs. This
power depends on the input capacitance of the MOSFETs
and the frequency of charge and discharge. The power
associated with this can be approximated by:
P
GATE
= f
G
• V
DD
• Q
G
• 1–
V
IN
16
where Q
G
is the required gate charge to charge the MOSFET
to the clamp voltage (7.4V) and f
G
is the frequency at which
the gate is charged and discharged. Normally f
G
is low and
the resulting power would be very low. Figure 13 shows
P
GATE
for a 50nC gate charge at a 1kHz rate.
Total power dissipation is the sum of all of P
DCVIN
, P
DCVDD
,
P
BOOST
and P
GATE
. Figure 14 is representative of the total
power dissipation of a typical application at steady state.
The die junction temperature is then computed as:
T
J
= T
A
+ θ
JA
• P
TOTAL
where T
J
is the die junction temperature, T
A
is the ambi-
ent temperature, θ
JA
is the thermal resistance of the part
(120°C/W) and P
TOTAL
is ascertained from the above.
Therefore, a 0.1W power dissipation causes a 12° tem-
perature rise above ambient.
Figure 12. P
BOOST(TYP)
V
IN
(V)
0
P
BOOST
(W)
0.015
0.020
L = 4.7µH
20
4351 F12
0.010
0.005
5
10
15
0.025
Figure 13. P
GATE
vs V
IN
(V
DD
= V
IN
+ 10.7)
V
IN
(V)
0
P
GATE
(W)
0.002
0.003
20
4351 F13
0.001
0
5
10
15
0.004
f
GATE
= 1kHz
Q
G
= 50nC
V
IN
(V)
0
POWER (W)
0.10
0.12
20
4351 F14
0.08
0.06
5
10
15
0.16
0.14
L = 10µH
L = 4.7µH
V
DD
= V
IN
+ 10
0.5mA GATE CURRENT
Figure 14. Total Power (Typical)