Datasheet

LT4351
12
4351fd
APPLICATIONS INFORMATION
As an example, for 500nH of inductance and R
ESR
of about
100mΩ, then:
C ≥
4 • 500nF
0.1
2
= 200µF
Check vendor data for ESR and iterate to get the best
value. Additional C
B
capacitance may be required for load
concerns.
If the boost regulator is being used, place a 10µF low ESR
ceramic capacitor from V
IN
to GND. Place a 10µF and a
0.1µF ceramic capacitor close to V
IN
and GND. These
capacitors should have low ESR (less than 10mΩ for the
10µF and 40mΩ for the 0.1µF). These capacitors help to
eliminate problems associated with noise produced by the
boost regulator. They are decoupled from the V
IN
supply
by a small 1Ω resistor, as shown in Figure 8. The LT4351
will perform better with a small ceramic capacitor (10µF)
on OUT to GND.
External Boost Supply
The V
DD
pin may be powered by an external supply. In
this case, simply omit the boost regulator inductor and
diode and leave the SW pin open. Suitable V
DD
capacitance
(minimum of a 1µF ceramic) should remain due to the
current pulses required for the gate driver.
The V
DD
current consists of 3.5mA of DC current with the
current required to charge the MOSFET’s gate which is
dependent on the gate charge required and frequency of
switching. Typically the average current will be under 10mA.
MOSFET Selection
The LT4351 uses either a single N-channel MOSFET or
back-to-back N-channel MOSFETs as the pass element.
Back-to-back MOSFETs prevent the MOSFET body diode
from passing current.
Use a single MOSFET if current flow is allowable from
input to output when the input supply is above the output
(limited overvoltage protection). In this case the MOSFET
should have a source on the input side so the body diode
conducts current to the load. Back-to-back MOSFETs are
normally connected with their sources tied together to
provide added protection against exceeding maximum
gate to source voltage.
Selection of MOSFETs should be based on R
DS(ON)
, BV
DSS
and BV
GSS
. BV
DSS
should be high enough to prevent
breakdown when V
IN
or OUT are at their maximum value.
R
DS(ON)
should be selected to keep within the MOSFET
power rating at the maximum load current (I
2
• R
DS(ON)
)
BV
GSS
should be at least 8V. The LT4351 will clamp the
GATE to 7.5V above the lesser of V
IN
or OUT. For back-
to-back MOSFETs where sources are tied together, this
allows the use of MOSFETs with a VGS max rating of 8V
or more. If a single MOSFET is used, care must be taken
to ensure the VGS max rating is not exceeded. When the
MOSFET is turned off, the GATE voltage is near ground,
the source at V
IN
. Thus, MOSFET VGS max must be greater
than V
IN(MAX)
.
If a single MOSFET is used with source to V
IN
, then BV
GSS
should be greater than the maximum V
IN
since the MOSFET
gate is at 0.2V when off.
Figure 8. V
IN
Capacitors
V
IN
1Ω
C
V3
10µF
C
V1
10µF
C
B
L
IN
PARASITIC
C
V2
0.1µF
V
IN
GATE
LT4351
4351 F08
GND