Datasheet

LT4256-3
17
42563fa
APPLICATIO S I FOR ATIO
WUU
U
Figure 16. High dV/dt MOSFET Turn-On Protection Circuit
4256 F16
R5
0.033Ω
LT4256-3
SENSE
13
10
12
5
7
8
16 15
1
2
4
9
V
CC
GATE
V
OUT
FB
PWRGD
RETRY
UV
OV
TIMER
GND
V
CC
48V
(SHORT PIN)
Q1
IRF530
D1
CMPZ5241BS
11V
D3
1N4148W
R3
4.02k
R2
4.02k
R1
64.9k
R7
100Ω
R9
4.02k
R6
10Ω
R8
36.5k
V
OUT
48V
1.2A
R4
27k
C
L
C2
33nF
C3
0.1µF
C1
10nF
OPEN
UV = 36V
OV = 73V
PWRGD = 40V
GND
D2
SMAT70A
+
Figure 17. Enhanced Output Pull-Down Circuit
In order to use this feature as designed, a bidirectional
Zener diode is needed for D1. When the LT4256-3 com-
mands the MOSFET off (and a bidirectional Zener is used),
the output discharges very slowly (t
OFF
= (C
LOAD
• V
OUT
)/
130µA). Several variations can be implemented to dis-
charge the output faster. The recommeded method is
shown in Figure 17 and uses an external PNP transistor,
diode and resistor to discharge the output quickly.
4256 F17
R5
0.010Ω
LT4256-3
SENSE
13
R
PROG
Q2
2N4920
D3
1N4148
R
B
18k
10
5
7
8
16 15
1
2
4
9
V
CC
GATE
FB
12
V
OUT
PWRGD
RETRY
UV
OV
TIMER
GND
V
CC
48V
(SHORT PIN)
Q1
IRF540
D1
CMPZ5241BS
11V
R3
4.02k
R2
4.02k
R1
64.9k
R7
100Ω
R9
4.02k
R6
1k
R8
36.5k
V
OUT
48V
4A
R4
51k
C
L
C2
33nF
C3
0.01µF
C1
10nF
OPEN
UV = 36V
OV = 73V
PWRGD = 40V
GND
D2
SMAT70A
+
The equation to set the nominal discharge current is:
I
R
A
DISCHG
PROG
=µ
()
5000
130
(11)
where R
PROG
must be less than 1k.
The maximum current equation is:
I
R
A
MAX
PROG
=µ
()
7000
350
(12)