Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - hot swap controller Multi-purpose SOIC 8 Surface-mount

LT4256-1/LT4256-2

425612fa

APPLICATIO S

FEATURES

TYPICAL APPLICATIO

DESCRIPTIO

The LT

4256-1/LT4256-2 are high voltage Hot Swap

controllers that allow a board to be safely inserted and

removed from a live backplane. An internal driver drives an

external N-channel MOSFET switch to control supply

voltages ranging from 10.8V to 80V.

The LT4256-1/LT4256-2 features an adjustable analog

foldback current limit. If the supply remains in current limit

for more than a programmable time, the N-channel

MOSFET shuts off and the PWRGD output asserts low. The

LT4256-2 automatically restarts after a time-out delay.

The LT4256-1 latches off until the UV pin is cycled low.

The PWRGD output indicates when the output voltage

rises above a programmed level. An external resistor

string from V

provides programmable undervoltage

protection.

The LT4256 can be used as an upgrade to LT1641 designs.

See Table 1 on page 14 for upgraded specifications.

The LT4256-1 and LT4256-2 are available in an 8-pin SO

package that is pin compatible with the LT1641.

■

Hot Board Insertion

■

Electronic Circuit Breaker/Power Bussing

■

Industrial High Side Switch/Circuit Breaker

■

24V/48V Industrial/Alarm Systems

■

Ideally Suited for 12V, 24V and 48V Distributed

Power Systems

■

48V Telecom Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

■

Allows Safe Board Insertion and Removal from a

Live Backplane

■

Controls Supply Voltage from 10.8V to 80V

■

Foldback Current Limiting

■

Overcurrent Fault Detection

■

Drives an External N-Channel MOSFET

■

Programmable Supply Voltage Power-Up Rate

■

Undervoltage Protection

■

Latch Off Operation Mode (LT4256-1)

■

Automatic Retry (LT4256-2)

■

Available in an 8-Pin SO Package

Positive High Voltage

Hot Swap Controllers

Hot Swap is a trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

4256 TA01

0.02Ω

LT4256-1/

LT4256-2

SENSE

GATE

PWRGD

TIMER

GND

48V

GND

(SHORT PIN)

IRF530

CMPZ5241B

11V

8.06k

64.9k

100Ω

4.02k

10Ω

36.5k

PWRGD

OUT

48V

27k

33nF

0.1µF

10nF

SMAT70A

UV = 36V

PWRGD = 40V

48V, 2A Hot Swap Controller

PWRGD

50V/DIV

OUT

50V/DIV

INRUSH

CURRENT

500mA/DIV

50V/DIV

2.5ms/DIV

4256 TA02

LT4256 Start-Up Behavior

= 225µF

Summary of content (16 pages)

PAGE 1
LT4256-1/LT4256-2 Positive High Voltage Hot Swap Controllers U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ TM The LT®4256-1/LT4256-2 are high voltage Hot Swap controllers that allow a board to be safely inserted and removed from a live backplane. An internal driver drives an external N-channel MOSFET switch to control supply voltages ranging from 10.8V to 80V. Allows Safe Board Insertion and Removal from a Live Backplane Controls Supply Voltage from 10.
PAGE 2
LT4256-1/LT4256-2 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Supply Voltage (VCC) ................................ – 0.3 to 100V SENSE, PWRGD ....................................... – 0.3 to 100V GATE (Note 2) ................................ – 0.3V to VCC + 10V Maximum Input Current (GATE) ......................... 200µA FB, UV ........................................................ – 0.3 to 44V TIMER ..................................................... – 0.3V to 4.
PAGE 3
LT4256-1/LT4256-2 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 48V unless otherwise noted.
PAGE 4
LT4256-1/LT4256-2 U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. GATE Pin Pull-Up Current vs Temperature GATE Pin Pull-Down Current vs Temperature GATE PIN PULL-DOWN CURRENT (mA) –10 –15 –20 –25 –30 –35 –40 –50 –25 0 25 50 TEMPERATURE (°C) 75 0.4 62 0.2 0 61 –0.2 60 IUV (µA) –5 59 –0.8 –1.0 –1.2 56 –50 100 –25 0 25 50 TEMPERATURE (°C) 75 –1.4 100 0 1 2 3 4 20 VUV (V) 30 40 4256 G08 TIMER Pin Currents vs Temperature 14.
PAGE 5
LT4256-1/LT4256-2 U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Gate Pull-Down Capability vs VCC Below Minimum Operating Voltage FB Pin Current vs FB Pin Voltage 60 0.1 50 0 40 IFB (µA) IGATE (mA ) 0.2 –0.1 30 –0.2 20 –0.3 10 –0.
PAGE 6
LT4256-1/LT4256-2 U U U PI FU CTIO S UV (Pin 1): Undervoltage Sense. UV is an input that enables the output voltage. When UV is driven above 4V, GATE will start charging and the output turns on. When UV goes below 3.6V, GATE discharges and the output shuts off. Pulsing UV low for a minimum of 5µs after a current limit fault cycle resets the fault latch (LT4256-1) and allows the part to turn back on. This command is only accepted after TIMER has discharged below 0.65V.
PAGE 7
LT4256-1/LT4256-2 W BLOCK DIAGRA VCC SENSE 8 7 VP VP GEN FB 2 – 14mV ~ 55mV CURRENT LIMIT CHARGE PUMP AND GATE DRIVER + + FOLDBACK REF GEN 2V GATE 3 PWRGD 5 TIMER + – 3.99V UV 6 3.99V – 1 VCC – INTERNAL UV 9.8V + 4V – UV 0.65V + LOGIC + TIMER LOW – VP 108µA + TIMER HIGH 4.
PAGE 8
LT4256-1/LT4256-2 TEST CIRCUIT 48k PWRGD FB VCC 48V +– SENSE GATE UV TIMER GND 100pF 4256 F01 Figure 1 W UW TI I G DIAGRA S 4V GATE 4.45V 3.6V UV 3.99V FB tPLHUV tPHLUV VOUT +2V VOUT +2V tPLHFB PWRGD 1V tPHLFB 1V 4256 F03 4256 F02 Figure 2. UV to GATE Timing Figure 3. VOUT to PWRGD Timing VCC – SENSE 55mV tPHLSENSE VCC GATE 4256 F04 Figure 4.
PAGE 9
LT4256-1/LT4256-2 U U W U APPLICATIO S I FOR ATIO Q1 IRF530 R5 0.025Ω VIN 48V D2 SMAT70A (SHORT PIN) 8 VCC R1 64.9k 1 C3 0.1µF 7 SENSE GATE UV 6 LT4256-1/ LT4256-2 R2 8.06k + D1 CMPZ5241B 11V FB 2 CL VOUT 48V 1.6A R8 36.5k R6 10Ω R7 100Ω C1 10nF R4 27k R9 4.02k 5 GND C2 33nF TIMER PWRGD GND 4 3 PWRGD 4256 F05 UV = 36V PWRGD = 40V Figure 5. 1600mA, 48V Application When the power pins first make contact, transistor Q1 is held off.
PAGE 10
LT4256-1/LT4256-2 U W U U APPLICATIO S I FOR ATIO VCC – VSENSE RESPONSE TIME (µs) 12 55mV 10 8 6 4 2 14mV 0V 2V FB 0 4256 F07 50 100 150 VCC – VSENSE (mV) 200 4256 F08 Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage Figure 8. Response Time to Overcurrent Figure 11 shows how the LT4256-1/LT4256-2 are commanded to shut off with a logic signal. This is accomplished by pulling the gate of the open-drain MOSFET, Q2, (tied to the UV pin) high. For a 0.
PAGE 11
LT4256-1/LT4256-2 U W U U APPLICATIO S I FOR ATIO IOUT 500mA/DIV IOUT 500mA/DIV TIMER 5V/DIV TIMER 5V/DIV VOUT 50V/DIV VOUT 50V/DIV GATE 50V/DIV GATE 50V/DIV 10ms/DIV 4256 F09 10ms/DIV 4256 F10 Figure 9. LT4256-1 Current Limit Waveforms Figure 10. LT4256-2 Current Limit Waveforms When the TIMER pin reaches 4.65V (typ), the internal fault latch is set causing GATE to be pulled low and TIMER to be discharged to GND by the 3µA current source.
PAGE 12
LT4256-1/LT4256-2 U U W U APPLICATIO S I FOR ATIO (SHORT PIN) D2 SMAT70A 8 R1 64.9k VN2222 C3 Q2 0.01µF SENSE GATE UV 5 C2 33nF TIMER CL R8 36.5k R7 100Ω C1 10nF FB GND R6 10Ω 6 LT4256-1/ LT4256-2 R2 8.06k VOUT 48V 4A D1 CMPZ5241B 11V 7 VCC 1 OFF SIGNAL FROM MPU Q1 IRF530 R5 0.010Ω VIN 48V PWRGD GND 4 2 R9 4.02k R4 51k 3 4256 F07 UV = 36V PWRGD = 40V Figure 11. How to Use a Logic Signal to Control LT4256 Turn-On/-Off R5 100mΩ VIN D2 SMAT70A (SHORT PIN) 8 VCC R1 64.
PAGE 13
LT4256-1/LT4256-2 U U W U APPLICATIO S I FOR ATIO Supply Transient Protection The LT4256-1/LT4256-2 is 100% tested and guaranteed to be safe from damage with supply voltages up to 80V. However, voltage transients above 100V may cause permanent damage. During a short-circuit condition, the large change in currents flowing through the power supply traces can cause inductive voltage transients which could exceed 100V.
PAGE 14
LT4256-1/LT4256-2 U U W U APPLICATIO S I FOR ATIO Q1 IRF530 R5 0.033Ω VIN D2 SMAT70A 8 1 C3 0.1µF 7 VCC R1 64.9k (SHORT PIN) SENSE GATE UV R6 10Ω 6 R8 36.5k D3 MRA4003T3 R7 100Ω LT4256-1/ LT4256-2 R2 8.06k VOUT CL 100µF D1 CMPZ5241B 11V FB C1 10nF 2 R9 4.02k 5 C2 33nF GND TIMER PWRGD GND 4 R4 27k 3 4256 F14 UV = 36V PWRGD = 40V Figure 14.
PAGE 15
LT4256-1/LT4256-2 U PACKAGE DESCRIPTIO S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN 7 6 5 .160 ±.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 ±.005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 3 4 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) 0°– 8° TYP .016 – .050 (0.406 – 1.
PAGE 16
LT4256-1/LT4256-2 U U W U APPLICATIO S I FOR ATIO Q1 IRF530 R5 0.033Ω VIN D2 SMAT70A 8 1 C3 0.1µF 7 VCC R1 64.9k (SHORT PIN) SENSE GATE UV 6 FB R6 10Ω R7 100Ω LT4256-1/ LT4256-2 R2 8.06k VOUT CL 100µF D1 CMPZ5241B 11V 2 R8 36.5k D3 1N4148W C1 10nF R9 4.02k 5 C2 33nF GND TIMER PWRGD GND 4 R4 27k 3 4256 TA03 UV = 36V PWRGD = 40V Figure 15.