Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - hot swap controller Multi-purpose SSOP 16 Surface-mount

LT4254

4254fb

The LT

4254 is a high voltage Hot Swap

controller that

allows a board to be safely inserted and removed from a

live backplane. An internal driver controls the high side

N-channel MOSFET gate for supply voltages ranging from

10.8V to 36V. The part features an open-circuit detect

(OPEN) output that indicates abnormally low load current

conditions.

The LT4254 features an adjustable analog foldback cur-

rent limit. If the supply remains in current limit for more

than a programmable time, the N-channel MOSFET shuts

off, the PWRGD output goes low and the LT4254 either

automatically restarts after a time-out delay or latches off

until the UV pin is cycled low. The RETRY pin sets whether

the part will automatically restart after an overcurrent fault

or if it will latch off until the UV pin is cycled low.

The PWRGD output indicates when the output voltage

rises above a programmed level. An external resistor

string from V

provides programmable undervoltage and

overvoltage protection.

■

Hot Board Insertion

■

Electronic Circuit Breaker/Power Bussing

■

Industrial High Side Switch/Circuit Breaker

■

24V Industrial/Alarm Systems

■

12V and 24V Distributed Power Systems

■

Allows Safe Board Insertion and Removal from a

Live Backplane

■

Controls Supply Voltage from 10.8V to 36V

■

Foldback Current Limiting

■

Open Circuit and Overcurrent Fault Detect

■

Drives an External N-Channel MOSFET

■

Automatic Retry or Latched Off Operation

After Overcurrent Fault

■

Programmable Supply Voltage Power-Up Rate

■

Undervoltage and Overvoltage Protection

■

Open MOSFET Detection

■

Available in 16-Lead SSOP Package

Positive High Voltage

Hot Swap Controller

with Open-Circuit Detect

4254 TA01

0.025Ω

LT4254

SENSEV

GATE

PWRGD

RETRY

TIMER

GND

24V

GND

(SHORT PIN)

IRF530

CMPZ5241B

11V

40.2k

324k

100Ω

40.2k

10Ω

140k

PWRGD

OUT

24V

1.5A

27k

33nF

0.1µF

10nF

OPEN

UV = 20V

OV = 40V

PWRGD = 18V

24V, 2A Hot Swap Controller

20V/DIV

OUT

20V/DIV

INRUSH

CURRENT

500mA/DIV

PWRGD

20V/DIV

2.5ms/DIV

4245 TA02

LT4254 Start-Up Behavior

DESCRIPTIO

FEATURES

APPLICATIO S

, LTC and LT are registered trademarks of Linear Technology Corporation.

Hot Swap is a trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

= 168µF

CONTACT BOUNCE

TYPICAL APPLICATIO

Summary of content (16 pages)

PAGE 1
LT4254 Positive High Voltage Hot Swap Controller with Open-Circuit Detect U FEATURES DESCRIPTIO ■ The LT®4254 is a high voltage Hot Swap controller that allows a board to be safely inserted and removed from a live backplane. An internal driver controls the high side N-channel MOSFET gate for supply voltages ranging from 10.8V to 36V. The part features an open-circuit detect (OPEN) output that indicates abnormally low load current conditions.
PAGE 2
LT4254 U W W W ABSOLUTE AXI U RATI GS (Note 1) Supply Voltage (VCC) .................................. – 0.3 to 44V SENSE, PWRGD ......................................... – 0.3 to 44V GATE .......................................................... – 0.3 to 50V FB, UV, OPEN ............................................. – 0.3 to 44V OV .............................................................. – 0.3 to 18V RETRY ........................................................ – 0.3 to 15V TIMER ...........
PAGE 3
LT4254 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 24V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IPWRGD PWRGD Pin Leakage Current VPWRGD = 36V IINFB FB Input Current FB = 4.
PAGE 4
LT4254 U W TYPICAL PERFOR A CE CHARACTERISTICS FB Pin Threshold Voltage (Lowto-High) vs Temperature ICC vs Temperature ICC (mA) VCC = 36V VCC = 10.8V 1.6 1.4 1.2 1.0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 4.46 4.44 4.42 4.40 4.38 4.36 4.34 –50 –25 125 FB THRESHOLD VOLTAGE HIGH-TO-LOW (V) VCC = 24V 1.8 FB THRESHOLD VOLTAGE LOW-TO-HIGH (V) 2.0 50 25 75 0 TEMPERATURE (°C) 4254 G04 4.01 4.00 3.99 3.98 3.97 3.
PAGE 5
LT4254 U W TYPICAL PERFOR A CE CHARACTERISTICS –90 3.5 –100 –110 –120 –130 –140 50 25 0 75 TEMPERATURE (°C) 100 3.4 TA = 25°C TIMER PULL-DOWN CURRENT (µA) 4.0 TIMER PULL-DOWN CURRENT (µA) TIMER PULL-UP CURRENT (µA) –80 –150 –50 –25 TIMER Pin Pull-Down Current vs VCC TIMER Pin Pull-Down Current vs Temperature TIMER Pin Pull-Up Current vs Temperature 3.0 2.5 2.0 1.5 1.0 0.5 0 – 50 – 25 125 100 10 4.6 4.4 4.
PAGE 6
LT4254 U W TYPICAL PERFOR A CE CHARACTERISTICS OPEN Output Voltage vs ILOAD OV Hysteresis vs Temperature 3.70 10 500 450 3.60 3.55 400 350 75 0 25 50 TEMPERATURE (°C) 100 125 4 2 200 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 4254 G22 0 125 0 2 4 6 8 ILOAD (mA) 4254 G23 OPEN Pin Threshold Voltage vs Temperature 10 12 4254 G24 PWRGD Output Voltage vs ILOAD 6 5.0 TA = 25°C 5 4.5 PWRGD VOL (V) OPEN THRESHOLD VOLTAGE (mV) 6 300 250 3.50 –50 –25 TA = 25°C 8 OPEN VOL (V) 3.
PAGE 7
LT4254 U U U PI FU CTIO S reaches 4.65V (typ), the GATE pin is pulled low; the TIMER pull-up current will be turned off and the capacitor is discharged by a 3µA pull-down current. When the TIMER pin falls below 0.65V (typ), the GATE pin turns on again if the RETRY pin is high (if the RETRY pin is low, the UV pin must be pulsed low to reset the internal fault latch before the GATE pin will turn on).
PAGE 8
LT4254 W BLOCK DIAGRA VCC SENSE 16 15 +OPENCIRCUIT DETECT 3.5mV 4 OPEN – VP VP GEN FB 10 – 12mV ~ 50mV CURRENT LIMIT CHARGE PUMP AND GATE DRIVER + + FOLDBACK REF GEN 2V + – 4V RETRY 7 UV 1 OV 2 VCC 13 GATE 4V 5 PWRGD 9 TIMER – – INTERNAL UV 9.8V + 4V – UV 0.65V LOGIC + + TIMER LOW – VP – 123µA OV + 4V + TIMER HIGH 4.
PAGE 9
LT4254 TEST CIRCUIT PWRGD OPEN –+ 3V 24V VCC +– SENSE FB GATE OV TIMER UV RETRY GND 100pF 3V +– 4254 TC Figure 1 W UW TI I G DIAGRA S 4V 4.45V 3.6V UV tPLHUV GATE 4V FB tPHLUV tPLHFB tPHLFB VOUT +2V PWRGD VOUT +2V 1V 4254 F02 1V 4254 F03 Figure 2. UV to GATE Timing Figure 3. VOUT to PWRGD Timing VCC – SENSE 50mV tPHLSENSE VCC GATE 4254 F04 Figure 4.
PAGE 10
LT4254 U U W U APPLICATIO S I FOR ATIO Q1 IRF530 R5 0.025Ω VIN 24V D1 CMPZ5241B 11V (SHORT PIN) 16 VCC R1 324k 1 15 SENSE GATE UV 13 LT4254 C3 0.1µF R2 40.2k R3 40.2k 2 4 9 GND C2 33nF OV OPEN TIMER FB RETRY PWRGD GND 8 10 R6 10Ω CL VOUT 24V 1.5A R8 140k R7 100Ω C1 10nF R4 27k R9 40.2k 7 5 PWRGD 4254 F05 UV = 20V OV = 40V PWRGD = 18V Figure 5. 2A, 24V Application Resistor R7 compensates the current control loop while R6 prevents high frequency oscillations in Q1.
PAGE 11
LT4254 U U W U APPLICATIO S I FOR ATIO VCC – VSENSE RESPONSE TIME (µs) 12 50mV 10 8 6 4 2 12mV 0V 2V FB 0 50 4254 F07 100 150 VCC – VSENSE (mV) 200 4254 F08 Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage Figure 8. Response Time to Overcurrent Layout Considerations section for important information about board layout to minimize current limit threshold error.
PAGE 12
LT4254 U W U U APPLICATIO S I FOR ATIO Latch Off Operation Automatic Restart Operation (Short-Ciruit Output) IOUT 500mA/DIV IOUT 500mA/DIV TIMER 5V/DIV VOUT 20V/DIV VOUT 20V/DIV TIMER 5V/DIV GATE 1V/DIV GATE 20V/DIV 2.5ms/DIV 2.5ms/DIV 4254 F09 Figure 9. Latch Off Waveforms commanded to start back up. This can be commanded by cycling the UV pin to ground and then back high (this command can only be accepted after the TIMER pin discharges below the 0.
PAGE 13
LT4254 U U W U APPLICATIO S I FOR ATIO R5 100mΩ Q1 IRF530 VCC 16 VCC R1 324k 1 C3 0.1µF R2 40.2k 4 9 C2 33nF GND GATE 13 FB OV OPEN TIMER CL R6 10Ω VLOGIC R10 27k R7 100Ω LT4254 2 R3 40.2k 15 SENSE UV VOUT D1 CMPZ5241B 11V (SHORT PIN) RETRY PWRGD GND 8 10 7 C1 10nF R8 140k PWRGD R9 40.2k R4 27k 5 Q2 UV = 20V OV = 40V PWRGD = 18V 4254 F11 Figure 11.
PAGE 14
LT4254 U U W U APPLICATIO S I FOR ATIO Q1 IRF530 R5 0.033Ω VCC 16 VCC R1 324k 1 C3 0.1µF 2 4 9 GND GATE 13 C2 33nF OV OPEN TIMER R6 10Ω R8 140k MRA4003T3 R7 100Ω LT4254 R2 40.2k R3 40.2k 15 SENSE UV VOUT CL 100µF D1 CMPZ5241B 11V (SHORT PIN) FB RETRY PWRGD GND 8 10 C1 10nF R9 40.2k 7 R4 27k 5 4254 F14 UV = 20V OV = 40V PWRGD = 18V Figure 14. Negative Output Voltage Protection Diode Application standard threshold MOSFET can be used.
PAGE 15
LT4254 U U W U APPLICATIO S I FOR ATIO VCC VCC SHORT PIN R2 R1 R5 RSENSE R3 1 UV VCC 16 2 OV SENSE 15 3 NC 4 OPEN 5 LT4254 NC 14 GATE 13 PWRGD NC 12 6 NC NC 11 7 RETRY FB 10 8 GND TIMER 9 R7 C1 R6 R8 C2 VOUT Q1 D1 R4 VIA PWRGD R9 OPEN 2ND LAYER METAL GND GND 4254 F15 Figure 15. Recommended Component Placement U PACKAGE DESCRIPTIO GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.
PAGE 16
LT4254 U TYPICAL APPLICATIO Q1 IRF530 R5 0.033Ω VCC VOUT CL 100µF D1 CMPZ5241B 11V (SHORT PIN) VCC R1 324k SENSE R2 40.2k R8 140k GATE UV C3 0.1µF R6 10Ω R7 100Ω LT4254 IN4148W C1 10nF FB OV R3 40.2k C2 33nF GND OPEN TIMER R9 40.2k RETRY PWRGD GND R4 27k 4254 F16 UV = 20V OV = 40V PWRGD = 18V Figure 16.