Datasheet

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LT4220

4220f

APPLICATIO S

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

Dual Supply

Hot Swap Controller

■

Hot Swap

Controller for Positive

and Negative Supplies

■

Supply Tracking Mode

■

±2.7V to ±16.5V Operation

■

Analog Current Limit with Foldback

■

Allows Safe Board Insertion and Removal

from a Live Backplane

■

Open-Collector Power Good Comparators

■

Automatic Retry or Latchoff After a Current Fault

■

Dual Undervoltage Lockout Comparator Inputs

■

Current Fault Indication

■

Live Board Insertion

■

RAID Systems

■

–5.2V ECL Supplies

■

Industrial Controls

■

Split Supply Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LT

4220 16-pin dual voltage Hot Swap controller

allows a board to be safely inserted and removed from a

live backplane. The device operates with any combination

of 2.7V to 16.5V and –2.7V to –16.5V supplies. Using two

external N-channel pass transistors, the board supply

voltages can be ramped up at an adjustable rate. A select-

able tracking mode allows dual supply tracking control for

ramping the positive and negative supplies together.

The LT4220 features foldback current limit and latches off

both gates if either supply remains in current limit longer

than an adjustable time period. The IC can be configured

for automatic restart after a delay set by the same timer.

A power good signal indicates when the output voltages

monitored by the two FB comparators are within tolerance,

and the gate drive signals are at their full on voltage.

The LT4220 is available in a 16-lead narrow SSOP

package.

Hot Swap is a trademark of Linear Technology Corporation.

1µF

4.99k

36.5k

4.99k

36.5k

–12V

12V

FAULT

TIMER

GND

TRACK

–

PWRGD

R10

4.99k

36.5k

12V

OUT

R12

4.99k

R11

36.5k

4220 TA01

–12V

OUT

–

10Ω

–

SENSE

0.005Ω

–

0.005Ω

GATE

10Ω

10nF

100nF

SUB85N03-04

SENSE

–

SENSEK

LT4220

GATE

–

SUB85N03-04

CL2

CL1

Z2*

R14

10Ω

CONNECTOR 1

CONNECTOR 2

100nF

Z1*

R13

10Ω

–

* 1SMA13AT3 TRANSIENT

VOLTAGE SUPPRESSOR

716

15 14

R15

20k

R16, 20k

10nF

IN4001

±12V 10A Hot Swap Controller

12V

OUT

–12V

–

–12V

OUT

–

TIME (10ms/DIV)

Summary of content (16 pages)

PAGE 1
LT4220 Dual Supply Hot Swap Controller U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Hot SwapTM Controller for Positive and Negative Supplies Supply Tracking Mode ±2.7V to ±16.
PAGE 2
LT4220 U U W W W VCC to GND ............................................................. 22V VEE to GND ........................................................... –22V TRACK, TIMER .............................. – 0.3V to VCC + 0.3V ON+, FB + ................................. VEE – 0.3V to VCC + 0.3V ON –, FB – .................................. VEE – 0.3V to VCC + 0.3V GATE+ ................................................ –0.3V to VCC + 8V GATE – .............................. –16.
PAGE 3
LT4220 DC ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VEE = –5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX ● 0.09 ±1 µA ● 0.08 ±1 µA VCC = 2.7V, VEE = –2.7V to VCC = 16.5V, VEE = –16.5V ● 0.015 0.
PAGE 4
LT4220 AC ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VEE = –5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX tPHLON+ ON+ Low to GATE+ Low 5k Pull-Up to GATE+, 1nF Load Capacitor ● 0.6 0.8 1.2 µs tPLHON+ ON+ High to GATE+ High 5k Pull-Up to GATE+, 1nF Load Capacitor ● 0.6 1.5 3 µs tPHLFB + FB + Low to PWRGD Low 5k Pull-Up to PWRGD ● 0.
PAGE 5
LT4220 U W TYPICAL PERFOR A CE CHARACTERISTICS Drive vs VCC 10 TA = 25°C 7 GATE– DRIVE (VGATE– – VEE) (V) GATE+ DRIVE (VGATE+ – VCC) (V) 8 VEE = –5V 6 VEE = –2.7V 5 4 0 3 6 GATE + Pull-Up Current vs GATE+ Voltage GATE – Drive vs VEE 9 12 15 14 9 VCC = 5V 8 7 VCC = 2.
PAGE 6
LT4220 U W TYPICAL PERFOR A CE CHARACTERISTICS FB– and ON– Threshold Voltage vs Temperature TIMER Pull-Up Current vs Temperature –1.241 70 1.240 –1.240 69 1.239 1.238 1.237 1.236 1.235 –40 TIMER PULL-UP CURRENT (µA) 1.241 THRESHOLD VOLTAGE (V) THRESHOLD VOLTAGE (V) FB+ and ON+ Threshold Voltage vs Temperature –1.239 –1.238 –1.237 –1.236 –20 40 20 60 0 TEMPERATURE (°C) 80 –1.
PAGE 7
LT4220 U U U PI FU CTIO S VEE (Pin 1): Negative Supply. The negative supply input ranges from –2.7V to –16.5V for normal operation. IEE is typically –1.6mA. An internal undervoltage lockout circuit disables the device for inputs greater than –2.45V. A 10Ω, 1µF RC bypass network from VIN– to the VEE pin decouples transients from the device. SENSEK (Pin 2): Negative Supply Current Limit Kelvin Sense Pin. Connect to VIN–. SENSE – (Pin 3): Negative Supply Current Limit Sense Pin.
PAGE 8
LT4220 U U U PI FU CTIO S FAULT pin to the ON+ pin, otherwise the part remains latched off. To disable the timeout circuit breaker, connect the TIMER pin to GND. GND (Pin 9): Supply Ground Pin. PWRGD (Pin 10): Open-Collector Output to GND. PWRGD goes to high impedance after the initial GATE– and final GATE+ pins have reached their maximum voltage and after the FB+ pin goes above 1.24V low-to-high threshold and after the FB– pin falls below –1.24V high-to-low threshold.
PAGE 9
LT4220 W BLOCK DIAGRA VCC CURRENT LIMIT FROM SENSE AMPS TIMER AND LOGIC + ILIM FAULT S Q R R Q – 1.24V 60µA FAULT LATCH 8 TIMER 3µA 11 FAULT + – 0.5V 1.24V + ON+ ON – 12 PUMP 10µA ON– + 6 –1.24V 1.24V FB – GATE ON – UVLO VCC AND VEE GOOD FB + 15 SENSE+ +– 53mV + + + – 13 FB – 14 GATE + + VCC TRACK 10 PWRGD – S Q P GATE GOOD EN R Q + 5 –1.
PAGE 10
LT4220 W UW TI I G DIAGRA S ON + 0V 1V FB + 1V 100mV tPLHON+ GATE+ 0V tPHLON+ PWRGD 10V 0.5V 4220 F01 1V 100mV tPLHFB+ tPHLFB+ 2.5V 2.5V 0V Figure 1. ON+-to-GATE+ Timing 4220 F02 Figure 2. FB+-to-PWRGD Timing 0V ON– 1V 0V 0V –1V FB– –1V tPLHON– tPHLON– VEE + 3.5V GATE– 4220 F03 Figure 3. ON–-to-GATE– Timing tPHLFB– 2.5V 2.5V 0V 4220 F04 Figure 4. FB–-to-PWRGD Timing 100mV VCC – SENSE+ 0V tPLHFB– PWRGD VEE + 1.
PAGE 11
LT4220 U W U U APPLICATIO S I FOR ATIO live insertion. Resistive dividers R1, R2 and R3, R4 provide undervoltage sensing. Resistor dividers R9, R10 and R11, R12 provide a power good signal and control output voltage tracking when TRACK is enabled. Initial Power-Up Sequence After the power pins first make contact, transistors Q1 and Q2 remain off.
PAGE 12
LT4220 U W U U APPLICATIO S I FOR ATIO Whenever the output voltages reach their final value as sensed by R9, R10 and R11, R12 and both gate signals are fully on, the PWRGD pin will go high impedance. A typical timing sequence is shown in Figure 8 with tracking enabled. The sequence is as follows: 1) The power pins make contact and the undervoltage lockout thresholds are exceeded. 2) The ON comparator thresholds are exceeded and the GATE pins start ramping up.
PAGE 13
LT4220 U W U U APPLICATIO S I FOR ATIO Current Limit/Electronic Circuit Breaker The LT4220 features foldback current limit with an electronic circuit breaker that protects against short-circuits or excessive supply currents. The current limit is set by placing sense resistors between VCC (Pin 16) and SENSE+ (Pin 15) and between SENSEK (Pin 2) and SENSE– (Pin 3). An adjustable timer will trip an electronic circuit breaker if the part remains in current limit for too long.
PAGE 14
LT4220 U W U U APPLICATIO S I FOR ATIO Supply Tracking ON+, ON– Bypass Capacitors If the TRACK pin (Pin 7) is high the supply power-up tracking mode is enabled. This feature forces both supplies to reach their final value at the same time, during power-up and for faults that drive the output supplies to zero. During this mode the GATE pins are controlled to keep the differential magnitude of the FB pins to within 50mV. The FB pins are scaled versions of the output voltages.
PAGE 15
LT4220 U PACKAGE DESCRIPTIO GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .053 – .068 (1.351 – 1.727) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.
PAGE 16
LT4220 U TYPICAL APPLICATIO RS+ STAGGERED BACKPLANE PCB EDGE CONNECTOR CONNECTOR Q1 SUB85N03-04 POWER GOOD VCC VOUT + Z1* R13 10Ω C4 100nF 7 CONNECT FOR AUTO RESTART R1 TRACK 12 R2 C7 C6 1µF R5 10Ω 16 VCC 15 SENSE + ON+ 11 FAULT 8 TIMER RPG 5.