Datasheet

LT4180
9
4180fb
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applicaTions inForMaTion
DESIGN PROCEDURE
The first step in the design procedure is to determine
whether the LT4180 will control a linear or switching supply/
regulator. If using a switching power supply or regulator,
it is recommended that the supply be synchronized to the
LT4180 by connecting the OSC pin to the SYNC pin (or
equivalent) of the supply.
If the power supply is synchronized to the LT4180, the
power supply switching frequency is determined by:
f
OSC
=
4
R
OSC
C
OSC
Recommended values for R
OSC
are between 20k and 100k
(with 30.1k the optimum for best accuracy) and greater
than 100pF for C
OSC
. C
OSC
may be reduced to as low as
50pF, but oscillator frequency accuracy will be somewhat
degraded.
The following example synchronizes a 250kHz switching
power supply to the LT4180. In this example, start with
R
OSC
= 30.1k:
C
OSC
=
4
250kHz 30.1k
= 531pF
This example uses 470pF. For 250kHz:
R
OSC
=
4
250kHz 470pF
= 34.04k
The closest standard 1% value is 34k.
The next step is to determine the highest practical dither
frequency. This may be limited either by the response
time of the power supply or regulator, or by the propaga-
tion time of the wiring connecting the load to the power
supply or regulator.
First determine the settling time (to 1% of final value)
of the power supply. The settling time should be the
worst-case value (over the whole operating envelope: V
IN
,
I
LOAD
, etc.).
F1 =
1
2 t
SETTLING
Hz
For example, if the power supply takes 1ms to settle
(worst-case) to within 1% of final value:
F1 =
2 1e 3
= 500Hz
Next, determine the propagation time of the wiring. In
order to ignore transmission line effects, the dither period
should be approximately twenty times longer than this.
This will limit dither frequency to:
F2 =
V
F
20 1.017ns/ft L
Hz
Where V
F
is the velocity factor (or velocity of propagation),
and L is the length of the wiring (in feet).
For example, assume the load is connected to a power
supply with 1000ft of CAT5 cable. Nominal velocity of
propagation is approximately 70%.
F2 =
0.7
20 1.017e 9 1000
= 34.4kHz
The maximum dither frequency should not exceed F1 or
F2 (whichever is less):
f
DITHER
< min (F1, F2).
Continuing this example, the dither frequency should be
less than 500Hz (limited by the power supply).
With the dither frequency known, the division ratio can
be determined:
D
RATIO
=
f
OSC
f
DITHER
=
250,000
500
= 500
The nearest division ratio is 512 (set DIV0 = L, DIV1 =
DIV2 = H). Based on this division ratio, nominal dither
frequency will be:
f
DITHER
=
f
OSC
D
RATIO
=
250,000
512
= 488Hz
After the dither frequency is determined, the minimum
load decoupling capacitor can be determined. This load
capacitor must be sufficiently large to filter out the dither
signal at the load.