Datasheet

LT3995
21
3995f
For more information www.linear.com/LT3995
these layers will spread the heat dissipated by the LT3995.
Placing additional vias can reduce the thermal resistance
further. When operating at high ambient temperatures, the
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
(See the Thermal Derating curve in the Typical Performance
Characteristics section.)
Power dissipation within the LT3995 can be estimated by
calculating the total power loss from an efficiency measure-
ment and subtracting the catch diode loss and inductor
loss. The die temperature is calculated by multiplying the
LT3995 power dissipation by the thermal resistance from
junction to ambient. The temperature rise of the LT3995
for a 3.3V and 5V application is measured using a thermal
camera and is shown in Figure 11.
APPLICATIONS INFORMATION
Figure 10. Layout Showing a Good PCB Design
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 10 shows
a sample component placement with trace, ground plane
and via locations, which serves as a good PCB layout
example. Note that large, switched currents flow in the
LT3995’s V
IN
and SW pins, the catch diode (D1), and the
input capacitor (C1). The loop formed by these compo-
nents should be as small as possible. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
unbroken ground plane below these components. The SW
and BOOST nodes should be as small as possible. Finally,
keep the FB and RT nodes small so that the ground traces
will shield it from the SW and BOOST nodes. The exposed
pad on the bottom of the package must be soldered to
ground so that the pad acts as a heat sink. To keep thermal
resistance low, extend the ground plane as much as pos-
sible, and add thermal vias under and near the LT3995 to
additional ground planes within the circuit board and on
the bottom side.
V
OUT
V
IN
3995 F10
V
OUT
RT
PGFB
•
•
•
•
•
•
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
OUT
SW
EN
BST
17
SS
SYNC
High Temperature Considerations
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT3995. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias;
OUTPUT CURRENT (A)
1
40
50
70
2.5
3395 F11a
30
20
1.5 2 3
10
0
60
CHIP TEMPERATURE RISE (°C)
12V
24V
36V
48V
60V
V
OUT
= 3.3V
f
SW
= 300kHz
2.5in x 2.5in 4-LAYER BOARD
OUTPUT CURRENT (A)
1
CHIP TEMPERATURE RISE (°C)
50
60
70
3
3995 F11b
40
30
20
0
1.5
2
2.5
10
90
80
12V
24V
36V
48V
60V
V
OUT
= 5V
f
SW
= 500kHz
2.5in x 2.5in 4-LAYER BOARD
Figure 11a. Temperature Rise of the LT3995
in the Front Page Application
Figure 11b. Temperature Rise of the LT3995
in a 5V
OUT
Application