Datasheet
LT3976
22
3976f
For more information www.linear.com/3976
LT3976 power dissipation by the thermal resistance from
junction to ambient. The temperature rise of the LT3976 for
a 3.3V and 5V application was measured using a thermal
camera and is shown in Figure 11.
Also keep in mind that the leakage current of the power
Schottky diode goes up exponentially with junction tem-
perature. When the power switch is off, the power Schottky
diode is in parallel with the power converter’s output
filter stage. As a result, an increase in a diode’s leakage
current results in an effective increase in the load, and a
corresponding increase in the input quiescent current.
Therefore, the catch Schottky diode must be selected
with care to avoid excessive increase in light load supply
current at high temperatures.
applicaTions inForMaTion
Figure 10. Layout Showing a Good PCB Design
V
OUT
V
IN
3976 F10
V
OUT
RT
PGFB
•
•
•
•
•
•
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
OUT
SW
EN
BST
17
SS
SYNC
unbroken ground plane below these components. The SW
and BOOST nodes should be as small as possible. Finally,
keep the FB and RT nodes small so that the ground traces
will shield it from the SW and BOOST nodes. The exposed
pad on the bottom of the package must be soldered to
ground so that the pad acts as a heat sink. To keep thermal
resistance low, extend the ground plane as much as pos-
sible, and add thermal vias under and near the LT3976 to
additional ground planes within the circuit board and on
the bottom side.
High Temperature Considerations
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT3976. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3976.
Placing additional vias can reduce the thermal resistance
further. When operating at high ambient temperatures, the
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
(See Thermal Derating curve in the
Typical Performance
Characteristics section.)
Power dissipation within the LT3976 can be estimated by
calculating the total power loss from an efficiency measure-
ment and subtracting the catch diode loss and inductor
loss. The die temperature is calculated by multiplying the
Figure 11a. Temperature Rise of the LT3976 in
the Front Page Application
Figure 11b. Temperature Rise of the LT3976 in a
5V
OUT
Application
OUTPUT CURRENT (A)
1
0
CHIP TEMPERATURE RISE (°C)
30
40
45
50
70
3976 F11a
35
3
2
4 5
55
10
15
20
5
25
60
65
12V
24V
36V
V
OUT
= 3.3V
f
SW
= 400kHz
2.5in × 2.5in 4-LAYER BOARD
OUTPUT CURRENT (A)
1
0
CHIP TEMPERATURE RISE (°C)
30
40
50
90
3976 F11b
3
2
4 5
60
10
20
70
80
V
OUT
= 5V
f
SW
= 800kHz
2.5in × 2.5in 4-LAYER BOARD
12V
24V
36V