Datasheet

LT3971A/LT3971A-5
19
3971af
The LT3971A will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation.
The LT3971A may be synchronized over a 250kHz to 2MHz
range. The R
T
resistor should be chosen to set the LT3971A
switching frequency 20% below the lowest synchronization
input. For example, if the synchronization signal will be
250kHz and higher, the R
T
should be selected for 200kHz.
To assure reliable and safe operation the LT3971A will only
synchronize when the output voltage is near regulation as
indicated by the PG flag. It is therefore necessary to choose
a large enough inductor value to supply the required output
current at the frequency set by the R
T
resistor (see the
Inductor Selection section). The slope compensation is set
by the R
T
value, while the minimum slope compensation
required to avoid subharmonic oscillations is established
by the inductor size, input voltage, and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
is large enough to avoid subharmonic oscillations at the
frequency set by R
T
, than the slope compensation will be
sufficient for all synchronization frequencies.
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate exces-
sively, a LT3971A buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3971A is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3971A’s
output. If the V
IN
pin is allowed to float and the EN pin
is held high (either by a logic signal or because it is tied
to V
IN
), then the LT3971A’s internal circuitry will pull its
quiescent current through its SW pin. This is fine if your
system can tolerate a few A in this state. If you ground
the EN pin, the SW pin current will drop to essentially
zero. However, if the V
IN
pin is grounded while the output
is held high, regardless of EN, parasitic diodes inside the
LT3971A can pull current from the output through the SW
pin and the V
IN
pin. Figure 9 shows a circuit that will run
only when the input voltage is present and that protects
against a shorted or reversed input.
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 10 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3971A’s V
IN
and SW pins, the catch diode
(D1), and the input capacitor (C1). The loop formed by
APPLICATIONS INFORMATION
LT3971A
BOOSTV
IN
EN
V
IN
V
OUT
BACKUP
3971A F09
SW
BD
D4
MBRS140
FBGND
+
Figure 9. Diode D4 Prevents a Shorted Input from Discharging a
Backup Battery Tied to the Output. It Also Protects the Circuit from a
Reversed Input. The LT3971A Runs Only When the Input Is Present
VIAS TO LOCAL GROUND PLANE
VIAS TO V
OUT
VIAS TO RUN/SS
VIAS TO PG
VIAS TO V
IN
OUTLINE OF LOCAL
GROUND PLANE
3971A F10
L1
C2
V
OUT
D1
C1
C3
C5
C4
R1
R2
R
T
R
PG
GND
GND
VIAS TO SYNC
Figure 10. A Good PCB Layout Ensures Proper, Low EMI Operation