Datasheet

LT3959
8
3959fa
For more information www.linear.com/LT3959
block DiagraM
Figure 1. LT3959 Block Diagram Working as a SEPIC Converter (Shown for QFN Package)
1.22V
1.2V
2.5V
C
IN
C
VCC
INTV
CC
DRIVEV
IN
R
SENSE
V
ISENSE
I
S1
2.2µA
28
36
8, 9, 20, 21
30
25
EN/UVLO
BANDGAP
REFERENCE
TSD
~165˚C
A10
Q3
V
C
SGND
V
C
BG_LOW
UVLO
OTP
I
S2
10µA
I
S3
C
C1
R
PG
V
IN
C
C2
R
C
DRIVER
SLOPE
GND
13, 14
15, 16
17
SW
M1
45mV
SR1
+
–
RAMP
GENERATOR
+
–
R Q
S
2.5V
SS
C
SS
SYNC
FREQ
FOLDBACK
1.25V
FBX
PGOOD
FBX
Q4
1.6V
–0.8V
+
–
+
–
31
35
32 34
+
–
+
–
RAMP
PWM
COMPARATOR
FREQUENCY
FOLDBACK
100kHz ~ 1MHz
OSCILLATOR
R1
R2
L2
FBX
D1
C
DC
V
OUT
C
OUT
•
3759 F01
A1
A2
1.72V
–0.86V
+
–
+
–
A11
A12
+
–
A3
1.25V
FREQ
PROG
–
+
+
Q1
RT
R
T
A4
A5
A6
G5
G6
A7
Q2
G4
R3R4
V
IN
27
INTERNAL BIAS
GENERATOR
DRIVE LDO
CURRENT
LIMIT
INTERNAL BIAS
CURRENT
LIMIT
V
IN
LDO
A8
+
–
G8
1.52V
–0.76V
+
–
+
–
A13
A14
G7
2.7V
A15
+
–
G2
G1
•
L1
BG
SGND GNDK4, 24
33 12
SGND
SGND
SGND
(QFN Package)