Datasheet
LT3957
8
3957f
BLOCK DIAGRAM
Figure 1. LT3957 Block Diagram Working as a SEPIC Converter
L1
R3R4
L2
1.22V
2.5V
D1
C
DC
C
IN
V
OUT
C
OUT
C
VCC
INTV
CC
SENSE1
GND
SENSE2
M2
V
IN
R
SENSE
M1
V
ISENSE
•
V
IN
I
S1
2µA
27
SW
28
12, 13, 14,
15, 16, 17
25
EN/UVLO
INTERNAL
REGULATOR
AND UVLO
TLO
165˚C
A10
Q3
V
C
2.7V
A8
UVLO
I
S2
10µA
I
S3
DRIVER
SLOPE
SENSE
48mV
SR1
+
–
CURRENT
LIMIT
RAMP
GENERATOR
5.2V LDO
•
+
–
RO
S
2.5V
RT
R
T
SS
C
SS
SYNC
1.28V
1.2V
1.6V
–0.8V
+
–
+
–
+
–
32
VC
30
FBX
31 34 33
SGND
4, 23,
24, 37
+
–
+
–
6
3
RAMP
PWM
COMPARATOR
FREQUENCY
FOLDBACK
100kHz-1MHz
OSCILLATOR
FREQ
PROG
C
C2
C
C1
3957 F01
–
+
+
Q1
A1
A2
1.72V
–0.88V
+
–
+
–
A11
A12
A3
A4
A5
A6
G2
G5
G6
A7
Q2
G4
8, 9, 20,
21, 38
R1
R2
V
OUT
R
C
G1