Datasheet

LT3957A
12
3957afa
APPLICATIONS INFORMATION
the inductor current decay rate is very low during switch
off time. The minimum on-time limitation may prevent
the switcher from attaining a sufficiently low duty cycle
at the programmed switching frequency. So, the switch
current may keep increasing through each switch cycle,
exceeding the programmed current limit. To prevent the
switch peak currents from exceeding the programmed
value, the LT3957A contains a frequency foldback function
to reduce the switching frequency when the FBX voltage
is low (see the Normalized Switching Frequency vs FBX
graph in the Typical Performance Characteristics section).
During frequency foldback, external clock synchroniza-
tion is disabled to prevent interference with frequency
reducing operation.
Loop Compensation
Loop compensation determines the stability and transient
performance. The LT3957A uses current mode control to
regulate the output which simplifies loop compensation.
The LT3957A improves the no-load to heavy load transient
response, compared to the LT3957. New internal circuits
ensure that the transition from not switching to switching
at high current can be made in a few cycles. The optimum
values depend on the converter topology, the component
values and the operating conditions (including the input
voltage, load current, etc.). To compensate the feedback
loop of the LT3957A, a series resistor-capacitor network
is usually connected from the V
C
pin to SGND. Figure 1
shows the typical V
C
compensation network. For most
applications, the capacitor should be in the range of
470pF to 22nF, and the resistor should be in the range
of 5k to 50k. A small capacitor is often connected in
parallel with the RC compensation network to attenuate
the V
C
voltage ripple induced from the output voltage
ripple through the internal error amplifier. The parallel
capacitor usually ranges in value from 10pF to 100pF. A
practical approach to design the compensation network
is to start with one of the circuits in this data sheet that
is similar to your application, and tune the compensation
network to optimize the performance. Stability should
then be checked across all operating conditions, including
load current, input voltage and temperature. Application
Note 76 is a good reference on loop compensation.
The Internal Power Switch Current
For control and protection, the LT3957A measures the
internal power MOSFET current by using a sense resistor
(R
SENSE
) between GND and the MOSFET source. Figure 3
shows a typical waveform of the internal switch current
(I
SW
).
Due to the current limit (minimum 5A) of the internal power
switch, the LT3957A should be used in the applications
that the switch peak current I
SW(PEAK)
during steady state
normal operation is lower than 5A by a sufficient margin
(10% or higher is recommended).
The LT3957A switching controller incorporates 100ns
timing interval to blank the ringing on the current sense
signal across R
SENSE
immediately after M1 is turned on.
This ringing is caused by the parasitic inductance and
capacitance of the PCB trace, the sense resistor, the diode,
and the MOSFET. The 100ns timing interval is adequate
for most of the LT3957A applications. In the applications
that have very large and long ringing on the current sense
signal, a small RC filter can be added to filter out the excess
ringing. Figure 4 shows the RC filter on the SENSE1 and
SENSE2 pins. It is usually sufficient to choose 22 for
R
FLT
and 2.2nF to 10nF for C
FLT
. Keep R
FLT
’s resistance
low. Remember that there is 65µA (typical) flowing out of
the SENSE2 pin. Adding R
FLT
will affect the internal power
switch current limit threshold:
I
SW _ILIM
= 1−
65µA •R
FLT
48mV
⎛
⎝
⎜
⎞
⎠
⎟
•5A
Figure 3. The Switch Current During a Switching Cycle
3957A F03
I
SW(PEAK)
)I
SW
I
SW
t
DT
S
T
S