Datasheet

LT3957A
10
3957afa
APPLICATIONS INFORMATION
undervoltage (UV) threshold is 2.7V (typical), with 0.1V
hysteresis, to ensure that the internal MOSFET has suf-
ficient gate drive voltage before turning on. When INTV
CC
is below the UV threshold, the internal power switch will
be turned off and the soft-start operation will be triggered.
The logic circuitry within the LT3957A is also powered
from the internal INTV
CC
supply.
The INTV
CC
regulator must be bypassed to SGND imme-
diately adjacent to the IC pins with a minimum of 4.7µF
ceramic capacitor. Good bypassing is necessary to sup-
ply the high transient currents required by the MOSFET
gate driver.
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the internal power
MOSFET. The on-chip power dissipation can be significant
when the internal power MOSFET is being driven at a high
frequency and the V
IN
voltage is high.
An effective approach to reduce the power consumption of
the internal LDO for gate drive and to improve the efficiency
is to tie the INTV
CC
pin to an external voltage source high
enough to turn off the internal LDO regulator.
In SEPIC or flyback applications, the INTV
CC
pin can be
connected to the output voltage V
OUT
through a blocking
diode, as shown in Figure 2, if V
OUT
meets the following
conditions:
1. V
OUT
< V
IN
(pin voltage)
2. V
OUT
< 8V
A resistor R
VCC
can be connected, as shown in Figure 2, to
limit the inrush current from V
OUT
. Regardless of whether
or not the INTV
CC
pin is connected to an external voltage
source, it is always necessary to have the driver circuitry
bypassed with a 4.7µF low ESR ceramic capacitor to ground
immediately adjacent to the INTV
CC
and SGND pins.
If LT3957A operates at a low V
IN
and high switching fre-
quency, the voltage drop across the drain and the source
of the LDO PMOS (M2 in Figure 1) could push INTV
CC
to
be below the UV threshold. To prevent this from happening,
the INTV
CC
pin can be shorted directly to the V
IN
pin. V
IN
must not exceed the INTV
CC
Absolute Maximum Rating
(8V). In this condition, the internal LDO will be turned off
and the gate driver will be powered directly from V
IN
. It is
recommended that INTV
CC
pin be shorted to the V
IN
pin if
V
IN
is lower than 3.5V at 1MHz switching frequency, or V
IN
is lower than 3.2V at 100kHz switching frequency. With
the INTV
CC
pin shorted to V
IN
, however, a small current
(around 16µA) will load the INTV
CC
in shutdown mode.
Figure 2. Connecting INTV
CC
to V
OUT
C
VCC
4.7µF
V
OUT
3957A F02
INTV
CC
SGND
LT3957A
R
VCC
D
VCC
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation (a low switching frequency
may be required to ensure IC junction temperature does
not exceed 125°C), otherwise it is a trade-off between
efficiency and component size. Low frequency operation
improves efficiency by reducing gate drive current and
MOSFET and diode switching losses. However, lower
frequency operation requires a physically larger induc-
tor. Switching frequency also has implications for loop
compensation. The LT3957A uses a constant-frequency
architecture that can be programmed over a 100kHz to
1000kHz range with a single external resistor from the RT
pin to SGND, as shown in Figure 1. A table for selecting
the value of R
T
for a given operating frequency is shown
in Table 1.
Table 1. Timing Resistor (R
T
) Value
SWITCHING FREQUENCY (kHz) R
T
(kΩ)
100 140
200 63.4
300 41.2
400 30.9
500 24.3
600 19.6
700 16.5
800 14
900 12.1
1000 10.5