Datasheet

LT3837
22
3837fd
APPLICATIONS INFORMATION
With C
MILLER
determined, calculate the primary-side power
MOSFET power dissipation:
P
DPRI
=I
RMS(PRI)
2
•R
DS(ON)
1+d
( )
+
V
IN(MAX)
•
P
IN(MAX)
DC
IN
•R
DR
•
C
MILLER
V
GATE(MAX)
– V
TH
• f
OSC
where:
R
DR
is the gate driver resistance approximately 10Ω
V
TH
is the MOSFET gate threshold voltage
f
OSC
is the operating frequency.
(1 + d) is generally given for a MOSFET in the form of a
normalized RDS(ON) vs temperature curve. If you don’t
have a curve, use d = 0.005/°C as an estimate.
The secondary-side power MOSFETs typically operate
at substantially lower V
DS
, so you can neglect transition
losses. The dissipation is calculated using:
P
D(SEC)
= I
RMS(SEC)
2
• R
DS(ON)
(1 + d)
With power dissipation known, the MOSFETs’ junction
temperatures are obtained from the equation:
T
J
= T
A
+ P
D
• q
JA
where T
A
is the ambient temperature and q
JA
is the MOSFET
junction to ambient thermal resistance.
Once you have T
J
, iterate your calculations recomputing
d, power dissipations until convergence.
Gate Drive Node Consideration
The PG and SG gate drivers are strong drives to minimize
gate drive rise and fall times. This improves efficiency
but the high frequency components of these signals can
cause problems. Keep the traces short and wide to reduce
parasitic inductance.
The parasitic inductance creates an LC tank with the
MOSFET gate capacitance. In less than ideal layouts, a
series resistance of 5Ω or more may help to dampen the
ringing at the expense of slightly slower rise and fall times
and efficiency.
The LT3837 gate drives will clamp the max gate voltage to
roughly 7.4V, so you can safely use MOSFETs with max
V
GS
of 10V or larger.
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate drivers
and secondary side synchronous controllers available that
provide the buffer function as well as additional features.
Capacitor Selection
In a flyback converter, the input and output current flows in
pulses, placing severe demands on the input and output filter
capacitors. The input and output filter capacitors are selected
based on RMS current ratings and ripple voltage.
Select an input capacitor with a ripple current rating
greater than:
I
RMS
=
P
IN
V
IN(MIN)
1–DC
MAX
DC
MAX
Continuing the example:
I
RMS
=
37.5W
9V
1–52.4%
52.4%
= 3.97A
Input capacitor series resistance (ESR) and inductance
(ESL) need to be small as they affect electromagnetic
interference suppression. In some instances, high ESR can
also produce stability problems because flyback converters
exhibit a negative input resistance characteristic. Refer to
Application Note 19 for more information.
The output capacitor is sized to handle the ripple current
and to ensure acceptable output voltage ripple. The output
capacitor should have an RMS current rating greater than:
I
RMS
=I
OUT
DC
MAX
1–DC
MAX
Continuing the example:
I
RMS
=10A
52.4%
1–52.4%
=10.5A
This is calculated for each output in a multiple winding
application.