Datasheet

LT3837
15
3837fd
APPLICATIONS INFORMATION
tight coupling usually increases primary-to-secondary
capacitance and limits the primary-to-secondary break-
down voltage, so it isn’t always practical.
Primary Inductance
The transformer primary inductance, L
P
, is selected based
on the peak-to-peak ripple current ratio (X) in the trans-
former relative to its maximum value. As a general rule,
keep X in the range of 50% to 70% ripple current (i.e., X =
0.5 to 0.7). Higher values of ripple will increase conduction
losses, while lower values will require larger cores.
Ripple current and percentage ripple is largest at minimum
duty cycle; in other words, at the highest input voltage.
L
P
is calculated from:
L
P
=
V
IN(MAX)
•DC
MIN
( )
2
f
OSC
• X
MAX
•P
IN
=
V
IN(MAX)
•DC
MIN
( )
2
•Eff
f
OSC
• X
MAX
•P
OUT
where:
f
OSC
is the OSC frequency
DC
MIN
is the DC at maximum input voltage
X
MAX
is ripple current ratio at maximum input voltage
Continuing with the 9V to 3.3V example, let us assume a
10A output, 9V to 18V input power with 88% efficiency.
Using X = 0.7, and f
OSC
= 200kHz:
P
IN
=
3.3•10A
88%
= 37.5W
DC
MIN
=
1
1+
N• V
IN(MAX)
V
OUT
=
1
1+
1
3
•
18
3.3
= 35.5%
L
P
=
18V • 0.355
( )
2
200kHz • 0.7 • 37.5W
= 7.8µH
Optimization might show that a more efficient solution
is obtained at higher peak current but lower inductance
and the associated winding series resistance. A simple
spreadsheet program is useful for looking at tradeoffs.
Transformer Core Selection
Once L
P
is known, the type of transformer is selected.
High efficiency converters use ferrite cores to minimize
core loss. Actual core loss is independent of core size for
a fixed inductance, but decreases as inductance increases.
Since increased inductance is accomplished through
more turns of wire, copper losses increase. Thus trans-
former design balances core and copper losses. Remem-
ber that increased winding resistance will degrade cross
regulation and increase the amount of load compensa-
tion required.
The main design goals for core selection are reducing
copper losses and preventing saturation. Ferrite core mate-
rial saturates hard, rapidly reducing inductance when the
peak design current is exceeded. This results in an abrupt
increase in inductor ripple current and, consequently, out-
put voltage ripple. Do not allow the core to saturate! The
maximum peak primary current occurs at minimum V
IN
:
I
PK
=
P
IN
V
IN(MIN)
•DC
MAX
• 1+
X
MIN
2






now :
DC
MAX
=
1
1+
N• V
IN(MIN)
V
OUT
=
1
1+
1
3
•
9
3.3
= 52.4%
X
MIN
=
V
IN(MIN)
•DC
MAX
( )
2
f
OSC
•L
P
•P
IN
=
9 • 0.52
( )
2
200kHz • 7.8µH• 37.5W
= 0.380
Using the example numbers leads to:
I
PK
=
37.5W
9V • 0.524
• 1+
0.380
2






= 9.47A
Multiple Outputs
One advantage that the flyback topology offers is that ad-
ditional output voltages can be obtained simply by adding
windings. Designing a transformer for such a situation is
beyond the scope of this document. For multiple windings,
realize that the flyback winding signal is a combination of
activity on all the secondary windings. Thus load regulation
is affected by each windings load. Take care to minimize
cross regulation effects.