Datasheet

LT3837
12
3837fd
OPERATION
T1
•
•
•
MP
R
CMPF
50k
V
IN
V
FLBK
R2
LOAD
COMP I
R1
FB
V
FB
Q1 Q2
R
CMP
C
CMP
R
SENSE
SENSE
+
3837 F01
Q3
–
+
A1
8
14 13
12
Figure 1. Load Compensation Diagram
Figure 1 shows the block diagram of the load compensa-
tion function. Switch current is converted to voltage by the
external sense resistor, averaged and lowpass filtered by
the internal 50k resistor R
CMPF
and the external capacitor
on C
CMP
. This voltage is then impressed across the exter-
nal R
CMP
resistor by op amp A1 and transistor Q3. This
produces a current at the collector of Q3 that is subtracted
from the FB node. This action effectively increases the
voltage required at the top of the R1/R2 feedback divider
to achieve equilibrium.
The average primary side switch current increases to
maintain output voltage regulation as output loading
increases. The increase in average current increases
the R
CMP
resistor current which affects a corresponding
increase in sensed output voltage, compensating for the
IR drops.
Assuming a relatively fixed power supply efficiency, Eff,
power balance gives:
P
OUT
= Eff • P
IN
V
OUT
• I
OUT
= Eff • V
IN
• I
IN
Average primary side current is expressed in terms of
output current as follows:
I
IN
=K1•I
OUT
where:
K1=
V
OUT
V
IN
•Eff
So the effective change in V
OUT
target is:
∆V
OUT
=K1• ∆I
OUT
•
R
SENSE
R
CMP
•R1•N
SF
thus:
∆V
OUT
∆I
OUT
=K1•
R
SENSE
R
CMP
•R1•N
SF
where:
K1 = dimensionless variable related to V
IN
, V
OUT
and
efficiency as explained above
R
SENSE
= external sense resistor
Nominal output impedance cancellation is obtained by
equating this expression with R
S(OUT)
:
K1•
R
SENSE
R
CMP
•R1•N
SF
=
ESR+R
DS(ON)
1–DC
Solving for R
CMP
gives:
R
CMP
=K1•
R
SENSE
• 1–DC
( )
ESR+R
DS(ON)
•R1•N
SF
The practical aspects of applying this equation to determine
an appropriate value for the R
CMP
resistor are found in the
Applications Information section.