Datasheet

LT3825
6
3525fe
PIN FUNCTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum PG On-Time
vs Temperature
PG Delay Time vs Temperature
Enable Delay Time vs Temperature
TEMPERATURE (°C)
–50
t
ON(MIN)
(ns)
330
25
3825 G19
300
280
–25 0 50
270
260
340
320
310
290
75 100 125
R
tON(MIN)
= 158k
TEMPERATURE (°C)
–50
0
t
PGDLY
(ns)
50
150
200
250
0
50
75
3825 G20
100
–25 25
100 125
300
R
PGDLY
= 16.9k
R
PGDLY
= 27.4k
TEMPERATURE (°C)
–50
t
ED
(ns)
280
300
320
25 75
3825 G21
260
240
–25 0
50 100 125
220
200
R
ENDLY
= 90k
SG (Pin 1): Synchronous Gate Drive Output. This pin pro-
vides an output signal for a secondary-side synchronous
switch. Large dynamic currents may flow during voltage
transitions. See the Applications Information for details.
V
CC
(Pin 2): Supply Voltage Pin. Bypass this pin to
ground with a 4.7µF capacitor or more. This pin has a
19.5V clamp to ground. V
CC
has an undervoltage lockout
function that turns
the part on when V
CC
is approximately
15.3V and off at 9.7V. In a conventional “trickle-charge”
bootstrapped configuration, the V
CC
supply current
increases significantly during turn-on causing a benign
relaxation oscillation action on the V
CC
pin if the part does
not start normally.
t
ON
(Pin 3): Pin for external programming resistor to set
the minimum time that the primary switch is on for
each
cycle. Minimum turn-on facilitates the isolated feedback
method. See Applications Information for details.
ENDLY (Pin 4): Pin for external programming resistor to
set enable delay time. The enable delay time disables the
feedback amplifier for a fixed time after the turn-off of the
primary-side MOSFET. This allows the leakage inductance
voltage spike to be ignored for flyback voltage sensing.
See Applications Information for
details.
SYNC (Pin 5): Pin for synchronizing the internal oscilla-
tor with an external clock. The positive edge on a pulse
causes the oscillator to discharge causing PG to go low
(off) and SG high (on). The sync threshold is typically
1.53V. See Applications Information for details. Tie to
ground if unused.
SFST (Pin 6): This pin, in conjunction with a capacitor to
ground, controls the ramp-
up of peak primary current as
sensed through the sense resistor. This is used to control
converter inrush current at start-up. The V
C
pin voltage
cannot exceed the SFST pin voltage, so as SFST increases,
the maximum voltage on V
C
increases commensurately,
allowing higher peak currents. Total V
C
ramp time is ap-
proximately 70ms per µF of capacitance. Leave pin open
if not using the
soft-start function.
OSC (Pin 7): This pin in conjunction with an external
capacitor defines the controller oscillator frequency. The
frequency is approximately 100kHz • 100/C
OSC
(pF).
FB (Pin 8): Pin for the feedback node for the power supply
feedback amplifier. Feedback is usually sensed via a third
winding and enabled during the flyback period. This pin
also sinks additional current to compensate for load cur-
rent variation
as set by the R
CMP
pin. Keep the Thevenin
equivalent resistance of the feedback divider at roughly 3k.