Datasheet

LT3796/LT3796-1
18
3796fa
For more information www.linear.com/3796
R
T
resistor value see Table 2. An external resistor from the
RT pin to GND is required—do not leave this pin open.
Table 2. Typical Switching Frequency vs R
T
Value (1% Resistor)
f
osc
(kHz) R
T
(kΩ)
1000 6.65
900 7.50
800 8.87
700 10.2
600 12.4
500 15.4
400 19.6
300 26.1
200 39.2
100 82.5
Frequency Synchronization
The LT3796 switching frequency can be synchronized to an
external clock using the SYNC pin. For proper operation,
the R
T
resistor should be chosen for a switching frequency
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period. Observation
of the following guidelines about the SYNC waveform will
ensure proper operation of this feature. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise, maintain the duty cycle between 20% and 60%.
When using both PWM and SYNC features, the PWM signal
rising edge must have the aligned rising edges to achieve
the optimized high PWM dimming ratio. If the SYNC pin
is not used, it should be connected to GND.
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 8) and the switching frequency define
the minimum and maximum duty cycle of the switch,
APPLICATIONS INFORMATION
Figure 8. Typical Minimum On- and Off-Time
vs Temperature
TEMPERATURE
(°C)
–50
200
150
50
350
37961 F08
0–25
25 50 75 125100 150
100
0
250
300
TIME (ns)
MIN ON-TIME
MIN OFF-TIME
respectively. The following equations express the mini-
mum/ maximum duty cycle:
Min Duty Cycle = minimum on-time • switching
frequency
Max Duty Cycle = 1 minimum off-time switching
frequency
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
Setting Input Current Limit
The LT3796/LT3796-1 have a standalone current sense
amplifier. It can be used to limit the input current. As
shown in Figure 9, the input current signal is converted
to voltage output at CSOUT pin. When the CSOUT voltage
exceeds FB2 regulation voltage, the GATE is pulled low,
and the converter stops switching. The input current limit
is calculated as follows:
I
IN
= 1.25
R
IN1
R
OUT
R
SNS