Datasheet

LT3796/LT3796-1
11
3796fa
For more information www.linear.com/3796
PIN FUNCTIONS
SYNC (Pin 13) LT3796: The SYNC pin is used to syn-
chronize the internal oscillator to an external logic level
signal. If SYNC is used, the R
T
resistor should be chosen
to program an internal switching frequency 20% slower
than the SYNC pulse frequency. Gate turn-on occurs a fixed
delay after the rising edge of SYNC. Use a 50% duty cycle
waveform to drive this pin. If not used, tie this pin to GND.
TGEN (Pin 13) LT3796-1: Top Gate Driver Enable Pin. TGEN
signal low causes the TG pin to transition high and turn
off a PMOS switch, independent of the PWM input. Unlike
PWM, TGEN low does not put the switching regulator in an
idle state. TGEN can be used in combination with TG and
a PMOS switch to deactivate one of two output current
regulation loops. Tie the TGEN pin to 1.5V or higher if its
function is not used. There is an equivalent 90k resistor
from TGEN to ground internally.
PWM (Pin 14): PWM Input Signal Pin. A signal low turns
off switching, idles the oscillator, disconnects the V
C
pin
from all internal loads, and makes the TG pin high. There
is an equivalent 500k resistor from PWM pin to GND
internally. If not used, tie this pin to V
REF
.
FAULT (Pin 15): An open-collector pull-down on FAULT
asserts when any of the following conditions happen: 1.
FB1 overvoltage (V
FB1
> 1.3V), 2. INTV
CC
undervoltage,
3. LED overcurrent (V
(ISP-ISN)
> 375mV), or 4. Thermal
shutdown. If all faults are removed, FAULT flag returns
high. Fault status is only updated during PWM high
state and latched during PWM low state. FAULT remains
asserted until the SS pin is discharged below 0.2V for
cases 2, 3 and 4 above.
VMODE (Pin 16): An open-collector pull-down on VMODE
asserts if the FB1 input is above 1.19V (typical), and
V
(ISP-ISN)
is less than 25mV (typical). To function, the
pin requires an external pull-up resistor. VMODE status is
updated only during PWM high state and latched during
PWM low state.
SENSE (Pin 18): The current sense input for the control
loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, R
SENSE
, in the source
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be Kelvin connected to the
GND plane of the IC.
GATE (Pin 19): N-Channel MOSFET Gate Driver Output.
Switches between INTV
CC
and GND. It is driven to GND
during shutdown, fault or idle states.
INTV
CC
(Pin 20): Regulated Supply for Internal Loads, GATE
Driver and Top Gate (PMOS) Driver. Supplied from V
IN
and
regulates to 7.7V (typical). INTV
CC
must be bypassed with
a 4.7μF capacitor placed close to the pin. Connect INTV
CC
directly to V
IN
if V
IN
is always less than or equal to 7V.
V
IN
(Pin 23): Input Supply Pin. Must be locally bypassed
with a 0.22μF (or larger) capacitor placed close to the IC.
EN/UVLO (Pin 24): Enable and Undervoltage Lockout
Pin. An accurate 1.22V falling threshold with externally
programmable hysteresis detects when power is OK to
enable switching. Rising hysteresis is generated by the
external resistor divider and an accurate internal 3μA
pull-down current. Above the threshold (but below 6V),
EN/UVLO input bias current is sub-μA. Below the falling
threshold, a 3μA pull-down current is enabled so the
user can define the hysteresis with the external resistor
selection. An undervoltage condition resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce V
IN
quiescent current below 1μA.
V
S
(Pin 25): Current Sense Amplifier Power Supply Pin.
This pin supply current to the current sense amplifier and
can operate from 3V to 100V.
CSN (Pin 26): Negative Current Sense Input Terminal.
CSN remains functional for voltages up to 100V. Typically
connected to V
S
and CSP as shown in Figure 9.
CSP (Pin 27): Positive Current Sense Input Terminal. The
internal sense amplifier sinks current from CSP to regulate
it to the same potential as CSN. A resistor (R
IN1
) tied from
V
IN
to CSP sets the output current I
CSOUT
= V
SNS
/R
IN1
.
V
SNS
is the voltage developed across R
SNS
. See Figure 9.
CSOUT (Pin 28): Current Sense Amplifier Output. CSOUT
pin sources the current that is drawn from CSP. Typically
is output to an external resistor to GND.